Table of Contents
Advertisement
5
VCC : PROCESSOR CORE POWER SUPPLY.
VCCA : ISOLATE POWER FOR INTERNAL PLL.
VCCP : PROCESSOR I/O POWER SUPPLY.
VCCQ : QUIET POWER SUPPLY FOR ON DIE COMP CKT.
HA#[3..31]
5
HA#[3..31]
U506A
HA#3
P4
A3#
HA#4
U4
A4#
HA#5
V3
A5#
HA#6
R3
A6#
HA#7
V2
A7#
HA#8
W1
D
A8#
HA#9
T4
A9#
HA#10
W2
A10#
HA#11
Y4
A11#
HA#12
Y1
A12#
HA#13
U1
A13#
HA#14
AA3
A14#
HA#15
Y3
A15#
HA#16
AA2
A16#
HA#17
AF4
A17#
+VCCP
HA#18
AC4
A18#
HA#19
AC7
A19#
HA#20
AC3
A20#
HA#21
AD3
A21#
HA#22
R110
AE4
A22#
300
HA#23
AD2
A23#
0603
HA#24
AB4
A24#
HA#25
AC6
A25#
HA#26
AD5
A26#
HPWRGD
HA#27
AE2
A27#
HA#28
AD6
A28#
HA#29
AF3
A29#
HA#30
AE1
A30#
HREQ#[0..4]
HA#31
AF1
5
HREQ#[0..4]
A31#
HREQ#0
R2
REQ0#
HREQ#1
P3
REQ1#
HREQ#2
T2
REQ2#
HREQ#3
P1
REQ3#
HREQ#4
T1
REQ4#
N2
5
HADS#
ADS#
U3
5
HADSTB#0
ADSTB0#
AE5
5
HADSTB#1
ADSTB1#
HBR0#
N4
5
HBR0#
BR0#
J3
5
HBPRI#
BPRI#
C
L1
5
HBNR#
BNR#
J2
5
HLOCK#
LOCK#
+VCCP
R129
1
2
56
A4
IERR#
0603
K3
5
HHIT#
HIT#
K4
5
HHITM#
HITM#
L4
5
HDEFER#
DEFER#
M3
5
HTRDY#
TRDY#
HRS#0
H1
RS0#
HRS#[0..2]
HRS#1
K1
5
HRS#[0..2]
RS1#
HRS#2
L2
RS2#
HA20M#
C2
9
HA20M#
A20M#
D3
10
HFERR#
FERR#
C19
5
HDPWR#
DPWR#
HDBR#
A7
DBR#
HSLP#
A6
9
HSLP#
SLP#
TP1
1
HPSI#
E1
PSI#
HIGNNE#
A3
9
HIGNNE#
IGNNE#
HSMI#
B4
9
HSMI#
SMI#
HPWRGD
E4
9
HPWRGD
PWRGOOD
HPROCHOT#
B17
PROCHOT#
HSTPCLK#
C6
9
HSTPCLK#
STPCLK#
HDPSLP#
B7
5,9
HDPSLP#
DPSLP#
HINTR
D1
9
HINTR
LINT0
HNMI
D4
9
HNMI
LINT1
HINIT#
B5
9,20
HINIT#
INIT#
B11
4,5
HCPURST#
RESET#
A16
4
CLK_ITP_CPU
ITP_CLK0
B
A15
4
CLK_ITP_CPU#
ITP_CLK1
BANIAS
BGA479_SKT3
R102
1
Q10
2N7002
CPUVID5
S
D
+1.5V
8,9
B/CB#
R111
Q13
1K
SI2301DS
0603
D8
1
3
S
D
D
Q21
BAT54
G
S
4,5,9,29
STOP_CPU#
2N7002
GND
B/CB#
GPIO16
power on default = 1
A
+VCCP
+VCCP
+3V
R127
R132
56
10K/NA
0603
0603
HPROCHOT#
R133
TEMP_ALERT#
1
3
1
2
0/NA
0603
Q17
DTC144TKA/NA
5
4
HD#[0..63]
HD#[0..63] 5
HD#0
A19
D0#
A25
HD#1
D1#
HD#2
A22
D2#
HD#3
B21
D3#
HD#4
A24
D4#
HD#5
B26
D5#
HD#6
A21
D6#
B20
HD#7
D7#
C20
HD#8
D8#
HD#9
B24
D9#
HD#10
D24
D10#
HD#11
E24
D11#
HD#12
C26
D12#
HD#13
B23
D13#
E23
HD#14
D14#
HD#15
C25
D15#
HD#16
H23
D16#
HD#17
G25
D17#
HD#18
L23
D18#
HD#19
M26
D19#
HD#20
H24
D20#
F25
HD#21
D21#
HD#22
G24
D22#
HD#23
HCOMP0 & HCOMP2 should be
J23
D23#
HD#24
M23
route with 25 mil width
D24#
HD#25
J25
D25#
HD#26
L26
D26#
N24
HD#27
D27#
M25
HD#28
27.4
1
2
R100
HCOMP0
D28#
HD#29
0603
H26
D29#
HD#30
54.9
R101
HCOMP1
N25
1
2
D30#
HD#31
K25
1%
0603
D31#
HD#32
HCOMP2
Y26
27.4
1
2
R87
D32#
HD#33
AA24
0603
D33#
T25
HD#34
54.9
1
2
R89
HCOMP3
D34#
HD#35
1%
0603
U23
D35#
HD#36
V23
D36#
HD#37
R24
D37#
HD#38
R26
GND
D38#
HD#39
R23
D39#
HD#40
CPU_TEST1
AA23
R603
1
2
D40#
U26
HD#41
0603
1K
1%
D41#
HD#42
R116
CPU_TEST2
V24
1
2
D42#
HD#43
0603
1K
1%
U25
D43#
HD#44
R126
CPU_TEST3
V26
1
2
D44#
HD#45
Y23
0603
1K
1%
D45#
HD#46
AA26
D46#
Y25
HD#47
D47#
AB25
HD#48
GND
D48#
HD#49
AC23
D49#
HD#50
Close to CPU as possible.
AB24
D50#
HD#51
AC20
D51#
HD#52
AC22
D52#
HD#53
AC25
D53#
AD23
HD#54
+3V
D54#
HD#55
AE22
D55#
R602
HD#56
AF23
D56#
HD#57
HDBR#
AD24
1
2
D57#
HD#58
AF20
10K/NA
D58#
9
HD#59
AE21
0603
D59#
HD#60
AD21
D60#
AF25
HD#61
D61#
HD#62
AF22
D62#
HD#63
AF26
D63#
HDSTBN#[0..3]
HDSTBN#[0..3] 5
HDSTBN#0
C23
DSTBN0#
HDSTBN#1
K24
DSTBN1#
HDSTBN#2
W25
DSTBN2#
AE24
HDSTBN#3
DSTBN3#
HDSTBP#[0..3]
HDSTBP#[0..3] 5
HDSTBP#0
C22
DSTBP0#
HDSTBP#1
L24
DSTBP1#
HDSTBP#2
W24
DSTBP2#
HDSTBP#3
AE25
DSTBP3#
M2
DBSY#
HDBSY#
5
H2
HDRDY#
5
DRDY#
CPU_THERMDA
B18
THERMDA
CPU_THERMDA 20
CPU_THERMDC
A18
THERMDC
CPU_THERMDC 20
Don't overlay by CHOKE or vibrating signals.
C17
THERMTRIP#
CPU_THRMTRIP_OUT# 10
(1.05V)
2
0/NA
0603
VID5
29
R107
10K
0603
+VCCP
+VCCQ
L21
1
2
GND
120Z/100M
C116
C110
C123
2012
10U
0.1U
0.1U
1206
0603
0603
10V
50V
50V
1
0
GND
+VCCQ
Banias CPU Celeron Banias CPU
1.8V, Option to 1.5V
+VCCA
for future support.
VID[0..4]
29
VID[0..4]
CPUVID5
1%
1
0603
TEMP_ALERT# 10,20
1%
1
0603
GND
4
3
U506B
B15
4
HCLK_CPU
BCLK0
B14
4
HCLK_CPU#
BCLK1
HBPM#0
C8
4
HBPM#0
BPM0#
HBPM#1
B8
4
HBPM#1
BPM1#
0
0603 1
2
R599
A9
BPM2#
0
0603 1
2
R600
C9
BPM3#
+VCCP
HTCLK
A13
4
HTCLK
TCK
HTDI
C12
4
HTDI
TDI
HTDO
A12
4
HTDO
TDO
HTMS
C11
4
HTMS
TMS
HTRST#
R569
B13
4
HTRST#
TRST#
1K
HPREQ#
B10
4
HPREQ#
PREQ#
0603
HPRDY#
A10
4
HPRDY#
PRDY#
1%
AD26
GTLREF0
Close to CPU as possible.
E26
GTLREF1
G1
GTLREF2
AC1
GTLREF3
R566
C535
C532
2K
HCOMP0
220P
1U
P25
COMP0
0603
0603
0603
HCOMP1
P26
COMP1
10%
1%
HCOMP2
AB2
COMP2
HCOMP3
AB1
COMP3
GND
AF7
RSVD_0
HCOMP1 & HCOMP3 should be
C14
RSVD_2
C3
route with 5 mil width
RSVD_3
CPU_TEST1
C5
TEST1
CPU_TEST2
F23
TEST2
CPU_TEST3
C16
TEST3
HDINV#[0..3]
5
HDINV#[0..3]
HDINV#0
D25
DINV0#
HDINV#1
J26
DINV1#
HDINV#2
T24
DINV2#
HDINV#3
AD20
DINV3#
+VCC_CORE
AE11
VCC_61
AE13
VCC_62
AE15
VCC_63
AE17
VCC_64
AE19
VCC_65
AF8
VCC_66
AF10
VCC_67
AF12
VCC_68
AF14
VCC_69
AF16
VCC_70
AF18
VCC_71
BANIAS
+VCCP
BGA479_SKT3
1
2
R656
CPUPERF#
200
0603
HA20M#
1
2
R119
200/NA
0603
C133
C134
HIGNNE#
R128
1
2
10U
10U
200/NA
0603
1206
1206
HINTR
R117
10V
10V
1
2
200/NA
0603
HNMI
1
2
R114
200/NA
0603
GND
HSMI#
1
2
R120
+VCC_CORE
200/NA
0603
HSTPCLK#
R113
1
2
200/NA
0603
HDPSLP#
1
2
R115
200/NA
0603
HSLP#
1
2
R131
200/NA
0603
HINIT#
R121
1
2
200/NA
0603
PLACEMENT MAX. 3" FROM CPU.
+VCCP
U506D
D10
AB19
VCCP_0
VSS_146
D12
AB21
VCCP_1
VSS_147
D14
AB23
VCCP_2
VSS_148
D16
AB26
VCCP_3
VSS_149
E11
AC2
VCCP_4
VSS_150
E13
AC5
VCCP_5
VSS_151
E15
AC8
VCCP_6
VSS_152
F10
AC10
VCCP_7
VSS_153
F12
AC12
VCCP_8
VSS_154
F14
AC14
VCCP_9
VSS_155
F16
AC16
VCCP_10
VSS_156
K6
AC18
VCCP_11
VSS_157
L5
AC21
VCCP_12
VSS_158
L21
AC24
C560
VCCP_13
VSS_159
M6
AD1
10U
VCCP_14
VSS_160
1206
M22
AD4
VCCP_15
VSS_161
10V
N5
AD7
VCCP_16
VSS_162
N21
AD9
VCCP_17
VSS_163
P6
AD11
VCCP_18
VSS_164
P22
AD13
VCCP_19
VSS_165
R5
AD15
GND
VCCP_20
VSS_166
R21
AD17
VCCP_21
VSS_167
T6
AD19
VCCP_22
VSS_168
T22
AD22
VCCP_23
VSS_169
U21
AD25
VCCP_24
VSS_170
AE3
VSS_171
P23
AE6
VCCQ0
VSS_172
W4
AE8
VCCQ1
VSS_173
AE10
VSS_174
F26
AE12
VCCA0
VSS_175
B1
AE14
VCCA1
VSS_176
N1
AE16
VCCA2
VSS_177
AC26
AE18
VCCA3
VSS_178
AE20
VSS_179
VID0
E2
AE23
VID0
VSS_180
VID1
F2
AE26
VID1
VSS_181
VID2
+1.8V
+1.5V
F3
AF2
VID2
VSS_182
VID3
G3
AF5
VID3
VSS_183
VID4
G4
AF9
VID4
VSS_184
H4
AF11
VID5
VSS_185
AF13
L18
VSS_186
AF15
VSS_187
AF17
VSS_188
R80
2
AE7
AF19
VCCSENSE
VSS_189
54.9
AF21
VSS_190
2
R79
AF6
AF24
VSSENSE
VSS_191
54.9
BANIAS
BGA479_SKT3
GND
3
2
U506C
A2
VSS_0
A5
VSS_1
+VCC_CORE
A8
VSS_2
A11
VSS_3
A14
VSS_4
D6
A17
VCC_0
VSS_5
D8
A20
VCC_1
VSS_6
D18
A23
VCC_2
VSS_7
D20
A26
VCC_3
VSS_8
D22
B3
VCC_4
VSS_9
E5
B6
VCC_5
VSS_10
E7
B9
VCC_6
VSS_11
E9
B12
VCC_7
VSS_12
E17
B16
VCC_8
VSS_13
E19
B19
VCC_9
VSS_14
E21
B22
VCC_10
VSS_15
F6
B25
VCC_11
VSS_16
F8
C1
VCC_12
VSS_17
F18
C4
VCC_13
VSS_18
F20
C7
VCC_14
VSS_19
F22
C10
VCC_15
VSS_20
G5
C13
VCC_16
VSS_21
G21
C15
VCC_17
VSS_22
H6
C18
VCC_18
VSS_23
H22
C21
VCC_19
VSS_24
J5
C24
VCC_20
VSS_25
J21
D2
VCC_21
VSS_26
K22
D5
VCC_22
VSS_27
U5
D7
VCC_23
VSS_28
V6
D9
VCC_24
VSS_29
V22
D11
VCC_25
VSS_30
W5
D13
VCC_26
VSS_31
W21
D15
VCC_27
VSS_32
Y6
D17
VCC_28
VSS_33
Y22
D19
VCC_29
VSS_34
AA5
D21
VCC_30
VSS_35
AA7
D23
VCC_31
VSS_36
AA9
D26
VCC_32
VSS_37
AA11
E3
VCC_33
VSS_38
AA13
E6
VCC_34
VSS_39
AA15
E8
VCC_35
VSS_40
AA17
E10
VCC_36
VSS_41
AA19
E12
VCC_37
VSS_42
AA21
E14
VCC_38
VSS_43
AB6
E16
VCC_39
VSS_44
AB8
E18
VCC_40
VSS_45
AB10
E20
VCC_41
VSS_46
AB12
E22
VCC_42
VSS_47
AB14
E25
VCC_43
VSS_48
AB16
F1
VCC_44
VSS_49
AB18
F4
VCC_45
VSS_50
AB20
F5
VCC_46
VSS_51
AB22
F7
VCC_47
VSS_52
AC9
F9
VCC_48
VSS_53
AC11
F11
VCC_49
VSS_54
AC13
F13
VCC_50
VSS_55
AC15
F15
VCC_51
VSS_56
AC17
F17
VCC_52
VSS_57
AC19
F19
VCC_53
VSS_58
AD8
F21
VCC_54
VSS_59
AD10
F24
VCC_55
VSS_60
AD12
G2
VCC_56
VSS_61
AD14
G6
VCC_57
VSS_62
AD16
G22
VCC_58
VSS_63
AD18
G23
VCC_59
VSS_64
AE9
G26
VCC_60
VSS_65
H3
VSS_66
H5
VSS_67
H21
VSS_68
+VCCP
H25
VSS_69
J1
VSS_70
J4
VSS_71
J6
VSS_72
C135
C125
C124
C132
C136
10U
10U
10U
10U
10U
BANIAS
1206
1206
1206
1206
1206
BGA479_SKT3
10V
10V
10V
10V
10V
Core power decoupling
+VCC_CORE
C57
C56
C79
C78
C77
10U
10U
10U
10U
10U
C76
C75
1206
1206
1206
1206
1206
10U
10U
10V
10V
10V
10V
10V
1206
1206
10V
10V
C54
C53
C151
C150
C149
10U
10U
10U
10U
10U
C148
C561
1206
1206
1206
1206
1206
10U
10U
10V
10V
10V
10V
10V
1206
1206
10V
10V
GND
GND
+VCC_CORE
+VCC_CORE
C111
C112
C113
C114
C115
C147
C146
10U
10U
10U
10U
10U
0.1U
0.1U
1206
1206
1206
1206
1206
0603
0603
10V
10V
10V
10V
10V
50V
50V
+VCC_CORE
C559
C558
C153
C154
C155
C156
10U
10U
10U
10U
10U
10U
1206
1206
1206
1206
1206
1206
10V
10V
10V
10V
10V
10V
C82
C105
0.1U
0.1U
0603
0603
50V
50V
+VCCP
+VCCP
C571
C574
C573
C572
C575
10U
10U
10U
10U
10U
1206
1206
1206
1206
1206
C569
C567
10V
10V
10V
10V
10V
0.1U
0.1U
0603
0603
50V
50V
GND
+VCCA
L17
0/NA
0805
1
2
0
0805
1
2
C58
C129
C138
2.2U
0.1U
0.1U
1206
0603
0603
16V
50V
50V
Title
CPU
Size
Document
GND
C
Number
Date:
Thursday, February 05, 2004
2
1
J22
VSS_73
J24
VSS_74
K2
VSS_75
K5
VSS_76
K21
VSS_77
K23
VSS_78
K26
VSS_79
L3
VSS_80
L6
VSS_81
L22
VSS_82
L25
VSS_83
M1
VSS_84
M4
VSS_85
M5
VSS_86
M21
VSS_87
M24
VSS_88
N3
VSS_89
N6
VSS_90
D
N22
VSS_91
N23
VSS_92
N26
VSS_93
P2
VSS_94
P5
VSS_95
P21
VSS_96
P24
VSS_97
R1
VSS_98
R4
VSS_99
R6
VSS_100
R22
VSS_101
R25
VSS_102
T3
VSS_103
T5
VSS_104
T21
VSS_105
T23
VSS_106
T26
VSS_107
U2
VSS_108
U6
VSS_109
U22
VSS_110
U24
VSS_111
V1
VSS_112
V4
VSS_113
V5
VSS_114
V21
VSS_115
V25
VSS_116
W3
VSS_117
W6
VSS_118
W22
VSS_119
W23
VSS_120
W26
VSS_121
Y2
VSS_122
Y5
VSS_123
Y21
VSS_124
Y24
VSS_125
AA1
VSS_126
AA4
VSS_127
AA6
C
VSS_128
AA8
VSS_129
AA10
VSS_130
AA12
VSS_131
AA14
VSS_132
AA16
VSS_133
AA18
VSS_134
AA20
VSS_135
AA22
VSS_136
AA25
VSS_137
AB3
VSS_138
AB5
VSS_139
AB7
VSS_140
AB9
VSS_141
AB11
VSS_142
AB13
VSS_143
AB15
VSS_144
AB17
VSS_145
GND
C74
C73
C72
C71
C55
10U
10U
10U
10U
10U
1206
1206
1206
1206
1206
10V
10V
10V
10V
10V
C562
C152
B
10U
10U
1206
1206
10V
10V
C64
C63
C62
C80
C81
0.1U
0.1U
0.1U
0.1U
0.1U
0603
0603
0603
0603
0603
50V
50V
50V
50V
50V
GND
C108
C130
C120
C144
C145
0.1U
0.1U
0.1U
0.1U
0.1U
0603
0603
0603
0603
0603
50V
50V
50V
50V
50V
GND
C119
C131
C568
C122
C121
0.1U
0.1U
0.1U
0.1U
0.1U
0603
0603
0603
0603
0603
50V
50V
50V
50V
50V
A
GND
Rev
411682810001
01
Sheet
3
of
29
1
Advertisement
Table of Contents
