Table 77. Mrc Progress Codes; Table 78. Mrc Fatal Error Codes - Intel S2600CO series User Manual

Intel® Server Board S2600CO Family TPS
Checkpoint Upper Nibble
MSB
8h 4h
LED #7 #6
MRC Progress Codes
B0h
1 0
B1h 1 0
B2h 1 0
B3h 1 0
B4h 1 0
B5h 1 0
B6h 1 0
B7h 1 0
B8h 1 0
B9h 1 0
BAh 1 0
BBh 1 0
BCh 1 0
BFh 1 0
Memory Initialization at the beginning of POST includes multiple functions, including: discovery,
channel training, validation that DIMM population is acceptable and functional, initialization of
the IMC and other hardware settings, and initialization of applicable RAS configurations.
When a major memory initialization error occurs and prevents the system from booting with data
integrity, a beep code is generated, the MRC will display a fatal error code on the diagnostic
LEDs, and a system halt command is executed. Fatal MRC error halts do NOT change the state
of the System Status LED, and do NOT get logged as SEL events. The following table lists all
MRC fatal errors that are displayed to the Diagnostic LEDs.
Checkpoint Upper Nibble
MSB
8h 4h
LED #7 #6
MRC Fatal Error Codes
E8h
1 1
Revision 1.4

Table 77. MRC Progress Codes

Diagnostic LED Decoder
1 = LED On, 0 = LED Off
Lower Nibble
2h 1h 8h 4h 2h
#5 #4 #3 #2 #1
1 1 0 0
1 1 0 0
1 1 0 0
1 1 0 0
1 1 0 1
1 1 0 1
1 1 0 1
1 1 0 1
1 1 1 0
1 1 1 0
1 1 1 0
1 1 1 0
1 1 1 1
1 1 1 1

Table 78. MRC Fatal Error Codes

Diagnostic LED Decoder
1 = LED On, 0 = LED Off
Lower Nibble
2h 1h 8h 4h 2h
#5 #4 #3 #2 #1
1 0 1 0 0
Intel order number G42278-004
Appendix F: POST Code Diagnostic LED Decoder
LSB
1h
#0
0 0 Detect DIMM population
0 1 Set DDR3 frequency
1 0 Gather remaining SPD data
1 1 Program registers on the memory controller level
0 0 Evaluate RAS modes and save rank information
0 1 Program registers on the channel level
1 0 Perform the JEDEC defined initialization sequence
1 1 Train DDR3 ranks
0 0 Initialize CLTT/OLTT
0 1 Hardware memory test and init
1 0 Execute software memory init
1 1 Program memory map and interleaving
0 0 Program RAS configuration
1 1 MRC is done
Description (with MRC Internal Minor Code)
LSB
1h
#0
No usable memory error
01h = No memory was detected from the SPD read, or
0 invalid config that causes no operable memory.
02h = Memory DIMMs on all channels of all sockets are
disabled due to hardware memtest error.
Description
143