Intel S2600CO series User Manual page 54

Functional Architecture Overview
Six general-purpose timers

Interrupt controller
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Multiple Serial Peripheral Interface (SPI) flash interfaces
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NAND/Memory interface
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Sixteen mailbox registers for communication between the BMC and host
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LPC ROM interface
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BMC watchdog timer capability
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SD/MMC card controller with DMA support
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LED support with programmable blink rate controls on GPIOs
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Port 80h snooping capability
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Secondary Service Processor (SSP), which provides the HW capability of offloading time

critical processing tasks from the main ARM core.
3.4.3.1 Remote Keyboard, Video, Mourse, and Storage (KVMS) Support
USB 2.0 interface for Keyboard, Mouse and Remote storage such as CD/DVD ROM and

floppy
USB 1.1/USB 2.0 interface for PS2 to USB bridging, remote Keyboard and Mouse

Hardware Based Video Compression and Redirection Logic
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Supports both text and Graphics redirection

Hardware assisted Video redirection using the Frame Processing Engine

Direct interface to the Integrated Graphics Controller registers and Frame buffer

Hardware-based encryption engine
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3.4.3.2 Integrated BMC Embedded LAN Channel
The Integrated BMC hardware includes two dedicated 10/100 network interfaces. These
interfaces are not shared with the host system. At any time, only one dedicated interface may
be enabled for management traffic. The default active interface is the NIC 1 port.
For these channels, support can be enabled for IPMI-over-LAN and DHCP. For security reasons,
embedded LAN channels have the following default settings:
 IP Address: Static.
All users disabled.

For a functional overview of the baseboard management features, refer to Chapter 6.
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Intel order number G42278-004
Intel® Server Board S2600CO Family TPS
Revision 1.4