Table 11. Usb Port Mapping - Intel ® Core i7 User Manual

 IO headers are provided for the other 8 USB lanes.
Over current protection has been provided for ports in pairs. Ports (0,1), (1,2)...(12,13) share
the OC Indicators.

Table 11. USB Port Mapping

USB Port
Port 0
Port 1
Port 2
Port 3
Port 4
Port 5
Port 6
Port 7
Port 8
Port 9
Port 10
Port 11
Port 12
Port 13
3.7.2.7
A SMSC SIO1007 serves as the SIO on the motherboard and is located at U9A1. Shunting the
jumper at J8C3 to the 2-3 positions can disable the SIO by holding it in reset. This allows
other SIO solutions to be tested in the LPC slot at J8F2. A sideband header is provided at
J9G2 for this purpose. This sideband header also has signals for LPC power management.
3.7.2.8
The SMSC SIO incorporates a serial port, and IrDA (Infrared), as well as general purpose IOs
(GPIO). The Serial Port connector is provided at J1A2, and the IrDA transceiver is located at
U6A2. The IrDA transceiver on the motherboard supports SIR (slow IR), FIR (Fast IR) and
CIR (Consumer IR). The option to select between these is supported through software and
GPIO pin (IR_MODE) on the SIO.
3.7.2.9
A Renesas* H8S/2117 (U9H1) serves as both SMC and KBC for the platform. The SMC/KBC
controller supports two PS/2 ports, battery monitoring and charging, wake/runtime SCI
32 323094
Panel
Back Panel I/O Connector
Back Panel I/O Connector
Back Panel I/O Connector
Back Panel I/O Connector
FPIO
FPIO
FPIO
FPIO
Back Panel
Back Panel
FPIO
FPIO
FPIO
FPIO
LPC Super I/O (SIO)/ LPC Slot
Serial IrDA
System Management Controller (SMC)/ Keyboard
Controller (KBC)
Connector
J3A3 (4 stacked USB Connector)
J3A3 (4 stacked USB Connector)
J3A3 (4 stacked USB Connector)
J3A3 (4 stacked USB Connector)
J8H1 (2x5 Connector)
J8H1 (2x5 Connector)
J7H3 (2x5 Connector)
J7H3 (2x5 Connector)
J4A1
J4A1 (Rework Required: Stuff R8F3 and
R8F5; No Stuff R8F2 and R8F4)
J7H4 (2x5 Connector)
J7H4 (2x5 Connector)
J7H2 (2x5 Connector)
J7H2 (2x5 Connector)
Dev Kit Manual