Processor - Intel ® Core i7 User Manual

3.7.1

Processor

The development kit uses the board design, which supports Intel
BGA package (U3E1). This processor is a 2-die package made up of the dual core processor,
graphics processor and integrate memory controller.
3.7.1.1 Processor Voltage Regulators
The development kit implements an onboard IMVP-6.5 regulator for the processor core supply,
which supports PSI (Power Status Indicator). The maximum current that can be supported by
the Core VR is 60 amps.
3.7.1.2 Processor Power Management
The Processor supports C0, C1 C1E, C3, and C6 states. On this platform all the power
management handshake happens over the DMI interface. None of the „Power State‟ status
signals can be observed on the board directly. Some important Power management pins on
the Processor are listed below.
 RESET_OBS#  This indicates the final handoff which gets the CPU out of RESET. It is
the final signal to go active in the reset sequence.
 VCCPWRGOOD_0/1  Input from the indicating that the system rails and clocks are
stable. The Processor is now ready to be brought out of reset.
 VTTPWRGOOD  Indicates to the Processor that the 1.1VTT rail is stable.
 PSI#  An output of the Processor indicating to the VR Controller that it can enter a
low current drive mode to improve its efficiency.
 IMON  This is a Voltage input to the Processor providing information on the CPU
current consumption.
 DPRSLPVR (VID7)  An output from the Processor to the IMVP Core VR indicating that
the CPU is in a very low power state.
The only way to detect the entry to/exit from the C1/C3 C-States is to read the DMI
transmissions.
3.7.1.3 Manual VID support for CPU VR
The development kit supports manual VID operation for Processor VR. A jumper J2B1<pins
15-16> is provided to enable "VID override" to the CPU VCC Core VR. The intent of this "VID
override" circuit is for ease of debug and testing. The VID0-VID6 signals of CPU have been
brought out from VID0-VID6 pins on the processor package.
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