Table 77. Diagnostic Led Post Code Decoder - Intel S2600CO Family Technical Product Specification

Hide thumbs Also See for S2600CO Family:
Table of Contents

Advertisement

Intel® Server Board S2600CO Family TPS
The following table provides a list of all POST progress codes:
Diagnostic LED Decoder
1 = LED On, 0 = LED Off
Checkpoint
Upper Nibble
MSB
8h
4h
2h
LED #
#7
#6
#5
SEC Phase
0
0
01h
0
0
02h
0
0
03h
0
0
04h
0
0
05h
0
0
06h
0
0
07h
0
0
08h
0
0
09h
0
0
0Eh
0
0
0Fh
PEI Phase
0
0
10h
0
0
11h
0
0
15h
0
0
19h
MRC Process Codes – MRC Progress Code Sequence is executed - See Table 75
PEI Phase continued...
0
0
31h
0
0
32h
0
0
33h
0
0
34h
0
0
35h
0
0
36h
0
1
4Fh
DXE Phase
0
1
60h
0
1
61h
0
1
62h
0
1
63h
0
1
68h
0
1
69h
0
1
6Ah
0
1
70h
0
1
71h
0
1
72h
0
1
78h
0
1
79h
1
0
90h
1
0
91h
1
0
92h
1
0
93h
1
0
94h
1
0
95h
1
0
96h
1
0
97h
1
0
98h
Revision 1.0

Table 77. Diagnostic LED POST Code Decoder

Lower Nibble
LSB
1h
8h
4h
2h
1h
#4
#3
#2
#1
#0
0
0
0
0
0
1
0
0
0
0
1
0
0
0
0
0
1
1
0
0
0
1
0
0
0
0
0
1
0
1
0
0
0
1
1
0
0
0
0
1
1
1
0
0
1
0
0
0
0
0
1
0
0
1
0
0
1
1
1
0
0
0
1
1
1
1
0
1
0
0
0
0
0
1
0
0
0
1
0
1
0
1
0
1
0
1
1
0
0
1
1
1
0
0
0
1
1
1
0
0
1
0
1
1
0
0
1
1
1
1
0
1
0
0
1
1
0
1
0
1
1
1
0
1
1
0
0
0
1
1
1
1
1
0
0
0
0
0
1
0
0
0
0
1
1
0
0
0
1
0
1
0
0
0
1
1
1
0
1
0
0
0
1
0
1
0
0
1
1
0
1
0
1
0
1
1
0
0
0
0
1
1
0
0
0
1
1
1
0
0
1
0
1
1
1
0
0
0
1
1
1
0
0
1
0
1
0
0
0
0
0
1
0
0
0
1
0
1
0
0
1
0
0
1
0
0
1
1
0
1
0
1
0
0
0
1
0
1
0
1
0
1
0
1
1
0
0
1
0
1
1
1
0
1
1
0
0
0
Intel order number G42278-002
Appendix F: POST Code Diagnostic LED Decoder
First POST code after CPU reset
Microcode load begin
CRAM initialization begin
Pei Cache When Disabled
SEC Core At Power On Begin.
Early CPU initialization during Sec Phase.
Early SB initialization during Sec Phase.
Early NB initialization during Sec Phase.
End Of Sec Phase.
Microcode Not Found.
Microcode Not Loaded.
PEI Core
CPU PEIM
NB PEIM
SB PEIM
Memory Installed
CPU PEIM (Cpu Init)
CPU PEIM (Cache Init)
CPU PEIM (BSP Select)
CPU PEIM (AP Init)
CPU PEIM (CPU SMM Init)
Dxe IPL started
DXE Core started
DXE NVRAM Init
SB RUN Init
Dxe CPU Init
DXE PCI Host Bridge Init
DXE NB Init
DXE NB SMM Init
DXE SB Init
DXE SB SMM Init
DXE SB devices Init
DXE ACPI Init
DXE CSM Init
DXE BDS Started
DXE BDS connect drivers
DXE PCI Bus begin
DXE PCI Bus HPC Init
DXE PCI Bus enumeration
DXE PCI Bus resource requested
DXE PCI Bus assign resource
DXE CON_OUT connect
DXE CON_IN connect
Description
143

Hide quick links:

Advertisement

Table of Contents
loading

This manual is also suitable for:

S2600co series

Table of Contents