Gtl+ Front Side Bus Specifications; Clock Specifications; Front Side Bus Clock (Bclk[1:0]) And Processor Clocking; Gtl+ Bus Voltage Definitions - Intel BX80562QX6700 - Core 2 Extreme 2.66 GHz Processor Datasheet

2.6.3.1

GTL+ Front Side Bus Specifications

In most cases, termination resistors are not required as these are integrated into the
processor silicon. See
termination.
Valid high and low levels are determined by the input buffers by comparing with a
reference voltage called GTLREF.
reference voltage (GTLREF) should be generated on the system board using high
precision voltage divider circuits.
Table 14.

GTL+ Bus Voltage Definitions

Symbol
GTLREF_PU
GTLREF_PD
R
TT
COMP[3:0]
COMP8
NOTES:
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
1.
GTLREF is to be generated from V
2.
GTLEREF land). Refer to the
R is the on-die termination resistance measured at V
3.
TT
COMP resistance must be provided on the system board with 1% resistors. COMP[3:0] and
4.
COMP8 resistors are to V
2.7

Clock Specifications

2.7.1

Front Side Bus Clock (BCLK[1:0]) and Processor Clocking

BCLK[1:0] directly controls the FSB interface speed as well as the core frequency of the
processor. As in previous generation processors, the processor's core frequency is a
multiple of the BCLK[1:0] frequency. The processor bus ratio multiplier will be set at its
default ratio during manufacturing.
The processor uses a differential clocking implementation. For more information on the
processor clocking, contact your Intel field representative.
Table 15.

Core Frequency to FSB Multiplier Configuration

Multiplication of System
Core Frequency to FSB
Frequency
NOTES:
Individual processors operate only at or below the rated frequency.
1.
Listed frequencies are not necessarily committed production frequencies.
2.
26
Table 8 for details on which GTL+ signals do not include on-die
Table 14
Parameter
GTLREF pull-up resistor
GTLREF pull-down resistor
Termination Resistance
COMP Resistance
COMP Resistance
TT
applicable platform design guide
.
SS
Core Frequency
(266 MHz BCLK/
1066 MHz FSB)
1/6
1/7
1/8
1/9
1/10
1/11
1/12
lists the GTLREF specifications. The GTL+
Min Typ
124 * 0.99 124
210 * 0.99 210
45 50
49.40 49.90
24.65 24.90
by a voltage divider of 1% resistors (one divider for each
for implementation details.
/3 of the GTL+ output driver.
TT
Core Frequency
(333 MHz BCLK/
1333 MHz FSB)
1.60 GHz
1.87 GHz
2.13 GHz
2.40 GHz
2.66 GHz
2.93 GHz
3.20 GHz
Electrical Specifications
Max Units Notes
124 * 1.01 Ω
210 * 1.01 Ω
55 Ω
50.40 Ω
25.15 Ω
Notes
2.00 GHz -
2.33 GHz -
2.66 GHz -
3.00 GHz -
3.33 GHz -
3.66 GHz -
4.00 GHz -
Datasheet
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