Intel E6420 - Core 2 Duo Dual-Core Processor Datasheet page 65

Intel core 2 extreme processor x6800δ and intel core 2 duo desktop processor e6000δ and e4000δ sequences
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Land Listing and Signal Descriptions
Table 25.
Land
Land Name
#
U28
U29
U30
V1
V2
RESERVED
V3
V4
V5
V6
V7
V8
V23
V24
V25
V26
V27
V28
V29
V30
W1
W2
TESTHI12/FC44
W3
W4
W5
W6
W7
W8
W23
W24
W25
W26
W27
W28
W29
W30
Y1
Y2
Y3
Y4
Datasheet
Numerical Land
Assignment
Signal Buffer
Type
VCC
Power/Other
VCC
Power/Other
VCC
Power/Other
MSID1
Power/Other
VSS
Power/Other
A15#
Source Synch Input/Output
A14#
Source Synch Input/Output
VSS
Power/Other
VSS
Power/Other
VCC
Power/Other
VSS
Power/Other
VSS
Power/Other
VSS
Power/Other
VSS
Power/Other
VSS
Power/Other
VSS
Power/Other
VSS
Power/Other
VSS
Power/Other
MSID0
Power/Other
Power/Other
TESTHI1
Power/Other
VSS
Power/Other
A16#
Source Synch Input/Output
A18#
Source Synch Input/Output
VSS
Power/Other
VCC
Power/Other
VCC
Power/Other
VCC
Power/Other
VCC
Power/Other
VCC
Power/Other
VCC
Power/Other
VCC
Power/Other
VCC
Power/Other
VCC
Power/Other
FC0
Power/Other
VSS
Power/Other
FC17
Power/Other
A20#
Source Synch Input/Output
Table 25.
Land
Direction
Land Name
#
Y5
Y6
A19#
Y7
Output
Y8
Y23
Y24
Y25
Y26
Y27
Y28
Y29
Y30
AA1
VTT_OUT_RIGHT
AA2
FC39
AA3
AA4
A21#
AA5
A23#
AA6
AA7
Output
AA8
Input
AA23
Input
AA24
AA25
AA26
AA27
AA28
AA29
AA30
AB1
AB2
IERR#
AB3
FC37
AB4
A26#
AB5
A24#
AB6
A17#
AB7
AB8
AB23
AB24
AB25
Numerical Land
Assignment
Signal Buffer
Direction
Type
VSS
Power/Other
Source Synch Input/Output
VSS
Power/Other
VCC
Power/Other
VCC
Power/Other
VCC
Power/Other
VCC
Power/Other
VCC
Power/Other
VCC
Power/Other
VCC
Power/Other
VCC
Power/Other
VCC
Power/Other
Power/Other
Power/Other
VSS
Power/Other
Source Synch Input/Output
Source Synch Input/Output
VSS
Power/Other
VSS
Power/Other
VCC
Power/Other
VSS
Power/Other
VSS
Power/Other
VSS
Power/Other
VSS
Power/Other
VSS
Power/Other
VSS
Power/Other
VSS
Power/Other
VSS
Power/Other
VSS
Power/Other
Asynch CMOS
Power/Other
Source Synch Input/Output
Source Synch Input/Output
Source Synch Input/Output
VSS
Power/Other
VCC
Power/Other
VSS
Power/Other
VSS
Power/Other
VSS
Power/Other
Output
Output
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