Contents
1
Introduction .............................................................................................................. 9
1.1
1.1.1
1.2
Interfaces ........................................................................................................ 11
1.2.1
1.2.2
PCI Express* ......................................................................................... 12
1.2.3
1.2.4
1.3
1.3.1
Processor Core....................................................................................... 14
1.3.2
System ................................................................................................. 14
1.3.3
Memory Controller.................................................................................. 14
1.3.4
PCI Express* ......................................................................................... 14
1.4
1.5
Package ........................................................................................................... 15
1.6
Terminology ..................................................................................................... 15
1.7
Related Documents ........................................................................................... 17
2
Interfaces................................................................................................................ 19
2.1
2.1.1
2.1.2
2.1.3
2.1.3.1
2.1.3.2
2.1.4
2.1.5
Technology Enhancements of Intel
2.1.5.1
2.1.5.2
2.1.5.3
2.1.6
2.2
PCI Express* Interface....................................................................................... 25
2.2.1
2.2.1.1
2.2.1.2
2.2.1.3
2.2.2
2.2.3
2.2.3.1
2.3
2.3.1
DMI Error Flow....................................................................................... 28
2.3.2
2.3.3
DMI Link Down ...................................................................................... 28
2.4
2.5
Interface Clocking ............................................................................................. 29
2.5.1
3
Technologies ........................................................................................................... 31
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3.1
3.1.1
3.1.2
Datasheet, Volume 1
Command Overlap .................................................................... 24
Transaction Layer ..................................................................... 26
Data Link Layer ........................................................................ 26
Physical Layer .......................................................................... 26
®
VT-x Objectives ............................................................................ 31
®
VT-x Features .............................................................................. 31
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®
Fast Memory Access (Intel
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3