Dram I/O Power Management; Pci Express* Power Management - Intel BX80605X3430 - Xeon 2.4 GHz Processor Datasheet

Data sheet
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Power Management
4.3.2.4

DRAM I/O Power Management

Unused signals should be disabled to save power and reduce electromagnetic
interference. This includes all signals associated with an unused memory channel.
Clocks can be controlled on a per DIMM basis. Exceptions are made for per DIMM
control signals, such as CS#, CKE, and ODT for unpopulated DIMM slots.
The I/O buffer for an unused signal should be tristated (output driver disabled), the
input receiver (differential sense-amp) should be disabled, and any DLL circuitry
related ONLY to unused signals should be disabled. The input path must be gated to
prevent spurious results due to noise on the unused signals (typically handled
automatically when input receiver is disabled).
4.4

PCI Express* Power Management

• Active power management support using L0s, and L1 states.
• All inputs and outputs disabled in L3 Ready state.
Datasheet, Volume 1
45

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