Intel S3200SHV - Entry Server Board Motherboard Specification page 37

Intel® Server Boards S3200SH/S3210SH TPS
3.2.3.17 PCI Express* x4 Sub-system
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The Intel ICH9R supports one PCI Express* x4-lane interface that can also be configured as a
single x1 or x4-lane port. The PCI Express* interface allows direct connection with the PXH-V or
dedicated PCI Express* devices. (Fully compliant with the PCI Express* Base Specification,
Rev 1.0a).
3.2.3.18 PCI
One 32-bit PCI bus segment is directed through the Intel
A. This PCI Segment A supports two PCI connectors and one embedded Intel
controller.
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The Intel ICH9R does not contain a PATA device controller in the chipset; therefore, SATA
interface CD-ROM/DVD-ROMs are recommended for use with the server board.
3.2.3.19 SATA Controller
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The Intel ICH9R contains six SATA ports that support data transfer rates up to 300 Mbyte/s per
port.
3.2.3.20 Compatibility Modules (DMA Controller, Timer/Counters, Interrupt Controller)
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The Intel ICH9R provides the functionality of two-cascaded 82C59 with the capability to handle
15 interrupts. It also supports processor system bus interrupts.
3.2.3.21 Advanced Programmable Interrupt Controller (APIC)
The APICs in the Intel
notification to the processor.
3.2.3.22 Universal Serial Bus (USB) Controller
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The Intel ICH9R contains one EHCI USB 2.0 controller and can support four USB ports. The
USB controller moves data between main memory and up to four USB connectors. All ports
function identically and with the same bandwidth.
The server board provides two external USB ports on the rear panel of the server board. The
dual-stack USB connector is located within the standard ATX I/O panel area. The Universal
Serial Bus Specification, Revision 1.1 defines the external connectors.
The third/fourth USB port is optional and can be accessed by cabling from an internal 9-pin
connector located on the server board to an external USB port located either in front or the rear
of a chassis.
3.2.3.23 Enhanced Power Management
One of the embedded features of the Intel
implements ACPI-compliant power management features. The server board supports sleep
states S1, S4, and S5.
Revision 1.8
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ICH9R use messages on the FSB for interrupt generation and
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Intel Order Number: E14960-009
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ICH9R Interface defined as segment
ICH9R is a power management controller. It
Functional Architecture
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82541PI LAN
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