Functional Architecture; Figure 4. Intel ® Compute Module Mfs5520Vi Functional Block Diagram - Intel MFSYS25V2 Specification

Functional Architecture

3. Functional Architecture
The architecture and design of the Intel
5520 Chipset I/O Hub (IOH) and the Intel
systems based on the Intel
QuickPath Interconnect (Intel
®
Intel 5520 Chipset I/O Hub (IOH) that provides a connection point between various I/O
components.
®
Intel 82801JR, which is the I/O controller hub (ICH10R) for the I/O subsystem.
This chapter provides a high-level description of the functionality associated with each chipset
component and the architectural blocks that make up the server board.
FLASH FLASH
4
2
TPM
Opt - int in TB
DRAM DRAM
Figure 4. Intel
6
®
Compute Module MFS5520VI is based on the Intel
®
82801JR ICH10 RAID. The chipset is designed for
® ®
Xeon Processor in FC-LGA 1366 socket B package with Intel
®
QPI). The chipset contains two main components:
BMC BMC
2
®
Compute Module MFS5520VI Functional Block Diagram
Intel order number: E64311-007
Intel® Compute Module MFS5520VI TPS
2
Primary
Mid-Plane Connector
®
®
SSI Compliant
Mezzanine
Flex IO
Connector
Revision 1.5