Serial Channel B Configuration - Digi NS9750 Hardware Reference Manual

Single chip 0.13μm cmos network-attached processor
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Calculation and example
This equation calculates the amount of time, in seconds, required to copy the
contents of the SPI-EEPROM to external memory:
Time = (1 / freq) * EEPROM
Example
SPI master clock frequency = 1.5 MHz
SPI-EEPROM = 256 Kb
Time for operation to complete = 175 ms

Serial Channel B configuration

When exiting the power-on reset state, serial channel B is in SPI master mode, which
facilitates communication with the external SPI-EEPROM. When the copy operation is
complete, serial channel B is returned to its default reset state. The next table shows
which configuration fields are updated by hardware, allowing the SPI master
interface to operate.
Register
Control A
Control A
Control B
Control B
Control B
Bit rate
Bit rate
Bit rate
Bit rate
Bit rate
Table 292: SPI master mode boot configuration
SIZE
Field
Value
CE
0x1
WLS
0x3
CSPOL
0x0
MODE
0x2
BITORDR
0x1
EBIT
0x1
TMODE
0x1
CLKMUX
0x1
TXCINV
0x1
N
0x00F
Description
Enable the channel
8 data bits per word
Chip select polarity to active low
SPI master mode
Bit order to MSB first
Enable the bit rate generator
Synchronous timing
Select BBus clock as reference
Transmit clock inverted
Create ~1.5 MHz SPI clock
w w w . d i g i e m b e d d e d . c o m
B B u s B r i d g e
4 8 5

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