R2: Translation Table Base Register; R3: Domain Access Control Register - Digi NS9750 Hardware Reference Manual

Single chip 0.13μm cmos network-attached processor
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R2: Translation Table Base register

Register R2 is the Translation Table Base register (TTBR), for the base address of the
first-level translation table.
Reading from R2 returns the pointer to the currently active first-level
translation table in bits [31:14] and an
Writing to R2 updates the pointer to the first-level translation table from
the value in bits[31:14] of the written value. Bits [13:0]
Use these instructions to access the Translation Table Base register:
The
CRm
Figure 14 shows the format of the Translation Table Base register.
31
Figure 14: R2: Translation Table Base register

R3: Domain Access Control register

Register R3 is the Domain Access Control register and consists of 16 two-bit fields, as
shown in Figure 15.
31
30
D15
Figure 15: R3: Domain Access Control register
Reading from R3 returns the value of the Domain Access Control register.
Writing to R3 writes the value of the Domain Access Control register.
MRC p15, 0, Rd, c2, c0, 0 ; read TTBR
MCR p15, 0, Rd, c2, c0, 0 ; write TTBR
and
fields
opcode_2
SHOULD BE ZERO
Translation table base
29
28
27
26
25
24
23
22
21
D14
D13
D12
D11
UNPREDICTABLE
when writing to R2.
14 13
20
19
18
17
16
15
14 13 12 11 10
D10
D9
D8
D7
w w w . d i g i e m b e d d e d . c o m
W o r k i n g w i t h t h e C P U
value in bits [13:0].
SHOULD BE ZERO
UNP/SBZ
9
8
7
6
5
D6
D5
D4
D3
D2
.
0
4
3
2
1
0
D1
D0
6 1

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