Dynamic Memory Precharge Command Period Register - Digi NS9750 Hardware Reference Manual

Dynamic Memory Precharge Command Period register

Address: A070 0030
The Dynamic Memory Precharge Command Period register allows you to program the
precharge command period, t
This value normally is found in SDRAM datasheets as t
Note:
31
15
Register bit assignment
Bits
D31:04
D03:00
Table 144: Dynamic Memory Precharge Command Period register
The Dynamic Memory Precharge Command Period register is used for all
four dynamic memory chip selects. The worst case value for all chip
selects must be programmed.
30 29 28 27
14 13 12 11
Access Mnemonic
N/A Reserved
R/W RP
. Modify this register only during system initialization.
RP
26 25 24 23
Reserved
10 9 8 7
Reserved
Description
N/A (do not modify)
Precharge command period (t
0x0–0xE
n+1 clock cycles, where the delay is in
0xF
16 clock cycles (reset value on
w w w . d i g i e m b e d d e d . c o m
M e m o r y C o n t r o l l e r
.
RP
22 21 20 19
6 5 4 3
)
RP
cycles.
CLK
)
reset_n
18 17 16
2 1 0
RP
2 1 3