Reset_Done As An Input; Reset_Done As An Output - Digi NS9750 Hardware Reference Manual

input reset pin can be driven by a system reset circuit or a simple power-on reset
circuit.

RESET_DONE as an input

Used at bootup only:
When set to 0, the system boots from SDRAM through the serial SPI EEPROM.
When set to 1, the system boots from Flash/ROM. This is the default.

RESET_DONE as an output

Sets to 1, per Step 6 in the boot sequence.
If the system is booting from serial EEPROM through the SPI port, the boot program
must be loaded into the SDRAM before the CPU is released from reset. The memory
controller is powered up with
configurations. The default address range for
chip selects are disabled.
Boot sequence
When the system reset turns to inactive, the reset signal to the CPU is still held
1
active.
An I/O module on the peripheral bus (BBus) reads from a serial ROM device that
2
contains the memory controller settings and the boot program.
The BBus-to-AHB bridge requests and gets the system bus.
3
The memory controller settings are read from the serial EEPROM and used to
4
initialize the memory controller.
The BBus-to-AHB bridge loads the boot program into the SDRAM, starting at
5
address 0.
The reset signal going to the CPU is released once the boot program is loaded.
6
RESET_DONE
The CPU begins to execute code from address
7
dy_cs_n[0]
is now set to 1.
enabled with a default set of SDRAM
is from
dy_cs_n[0]
0x0000 0000
w w w . d i g i e m b e d d e d . c o m
A b o u t N S 9 7 5 0
. The other
0x0000 0000
.
1 1