Emmc Boot Mode; Qspi Boot Mode; Sd Card Boot Mode - Enclustra Mercury+ XU7 User Manual

Figure 14: JTAG Boot Mode Resistor ‐ Assembly Drawing Top View (lower right part) for Revision 2 Modules
3.7

eMMC Boot Mode

In the eMMC boot mode, the PS boots from the eMMC flash located on the module. The flash device is
connected to the PS MIO pins 13 to 22 for 8‐bit data transfer mode.
3.8

QSPI Boot Mode

In the QSPI boot mode, the PS boots from the QSPI flash located on the module. The flash device is
connected to the PS MIO pins 0 to 5.
3.9

SD Card Boot Mode

In the SD card boot mode the PS boots from the SD card located on the base board. There are two SD
card boot modes available on the Mercury+ XU7 SoC module, as described in Table 35. The SD boot
mode with level shifter is currently not supported.
The SD boot mode with level shifter is used with Ultra High Speed ﴾UHS﴿ SD cards. The controller will
start the communication at 3.3 V and afterwards it will command the card to drop from 3.3 V operation
to 1.8 V operation. For this mode, an external SD 3.0 compliant level shifter is required. This boot mode
may be supported in the future by Enclustra modules and base boards.
For the SD card boot mode, the following requirements must be met:
The SD card must be connected to MIO pins 45 to 51.
A Zynq boot image must be generated from an MPSoC design having the SDIO controller enabled.
The boot image must be named "boot.bin" and then copied to the SD card.
The SDIO controller must be fed with a reasonable clock frequency. Refer to the reference design
for guidelines on SDIO settings.
For details on SD card boot, refer to the Zynq UltraScale+ MPSoC Technical Reference Manual [21].
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