Digital Audio Interface - Lexicon 960L Service Manual

960L Multi-Channel Digital Effects System Service Manual
I2S_256FS is the master clock to the D/A converters, and is 256FS in single-speed mode and 128FS in
double-speed mode. Source resistors in the clock lines reduce ringing due to reflections to provide proper
clocking.

Digital Audio Interface

Audio data flows between the IO cards (e.g. Analog Input, Analog Output, AES) on the IO backplane and
TMIX chips located on DSP (e.g. reverb) cards on the NLX backplane, over high speed serial audio
channels called octals. TMIX chips define the octal format and timing. The bit rate of an octal is either
11.2896 Mbps for a 44.1Khz word clock or 12.288 Mbps for a 48Khz-word clock. An octal channel contains
eight time slots. Each time slot can carry a 24 bit sample with up to 8 bits of status per sample. Note that
the TMIX interface does not directly support double speed sampling rates.
Octal serial digital audio from the I/O backplane appears on 6 pins of U1 as 3 distinct pairs of channels. A
controllable multiplexer implemented within interface U1 selects one pair of these octals to be the digital
source for analog output. The octal pair selection is determined by the state of the octal select field in the
CTLREG register within U1. Within U1, the selected 8 channels of high-speed data are converted to eight
individual I2S streams, each carrying complement and true data as previously described, one for each D/A
converter.
At double-speed sampling rates (88.2/96Khz), each high-speed channel can carry 4 audio samples during
each word clock period, so a pair can carry all 8 samples. Within a pair, samples from odd-numbered input
channels (lefts) are split off and carried by one member of the pair (SDO0/8/10), even-numbered ones
(rights) by the other (SDO1/9/11).
This division is the same at single-speed rates, and so is the bit rate. However, only the last four octal time
slots in each octal signal are used to derive the eight individual I2S audio streams. In both single- and
double-speed modes, two high-speed octal channels are necessary to carry 8 samples.
TMIX_WCKI
IOBUS_WCLK/
SDO0,2,4 Ignored
SDO1,3,5 Ignored
I2S0,2,4,6
I2S1,3,5,7
TMIX_WCKI
IOBUS_WCLK/
SDO0,2,4 S1:1
SDO1,3,5 S1:2
I2S Ch1,3,5,7 S0 : inverted data
I2S Ch2,4,6,8 S0 : inverted data
Pin Descriptions
Pin Name
Host Interfacse
7-24
Ignored Ignored Ignored
Ignored Ignored Ignored
S0 : inverted I2S data
S0 : inverted I2S data
S1:3 S1:5 S1:7
S1:4 S1:6 S1:8
S0 : non-inv data
S0 : non-inv data
Type Description
*S1:1 S1:3 S1:5
S1:2 S1:4 S1:6
S0 : Non-inv data
S0 : Non-inv data
S2:1 S2:3 S2:5
S2:2 S2:4 S2:6
S1 : inverted data S1 : non-inv data
S1 : inverted data S1 : non-inv data
S1:7
S1:8
S2:7
S2:8
channel number/data type