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Sensor Name
Nominal LNR
SB_1_8-VOL
CPU_PVDDQ_AB-
VOL
CPU_PVDDQ_EF-
VOL
SB_1_05-VOL
CPU_PVCCANA-
VOL
PAY_1_0_VR_I35
0
SB_1_0_88E1543
CPU_PVNN_NAC-
VOL
CPU_PVNN_PCH-
VOL
PVTT_AB-VOL
PVTT_EF-VOL
5.5.2.2 Temperature Sensors
Several temperature sensors are supported, either via board populated IC's (e.g. TMP75) or Intel PECI
readings from CPU.
All temperature sensors use a hysteresis of about 3°C for the event generation.
To prevent false temperature sensor events caused by a single incorrect reading, a mechanism is
implemented to ignore those readings. Each new reading is compared to the previous reading and if the
difference is more than 10°C, the reading is ignored.
This only applies for one reading. If there are more false readings in a row, the reading will be treated as
correct reading and a temperature sensor event might be generated. This avoids stuck temperature sensors.
The same mechanism is implemented for "0xFF" and "0x00" temperature value readings.
Table 5.5-5 Temperature Sensor list
Sensor Name
Nominal LNR
INLET-TMP
Copyright 2024 Advantech Co. Ltd. All rights reserved.
LCR
1.8
-
1.515
1.2
-
1.0
1.2
-
1.0
1.05
0.861
1.0
0.743
1.0
0.819
1.0
0.819
1.0
0.812
1.0
0.644
0.6
0.364
0.6
0.364
LCR
40
-
-
LNC
UNC
-
-
-
-
-
-
LNC
UNC
-
55
UCR
UNR
2.039
-
1.366
-
1.366
-
1.208
1.148
1.162
1.162
1.158
1.158
0.819
0.819
UCR
UNR
65
75
Page 79
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