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2.4.
CONNECTING THE DIGITAL VIDEO
2.5.
CONNECTING THE GENERAL PURPOSE INPUTS AND OUTPUTS
INSTALLATION
Model 8950-SID Digital Source ID Decoder Manual
2.4.1. Video Input
The 8950-SID decoder requires that a digital video source with VITC (with
timecode, source ID and VTR status encoded) be connected to the SDI IN
video input. The 8950-SID decoder may be configured to accept either 525
or 625 line digital video in the component (4:2:2) format. The VIDEO TYPE
parameter on the front panel menu must be set correctly to match the video
input.
(See section 3.6.1 for information on changing the video type
setting).
The Video LED indicator will be On when there is video present matching
the selected video type. When it is blinking it indicates that there is no
video present, or the wrong video type is selected.
2.4.2. Video Output
The SDI BYPASS and SDI OUT outputs contain the input video with
character data keyed in by the keyer. Connect one of these outputs to any
input on your system that accepts 8 or 10 bit SERIAL digital video. The
two outputs are identical except that the SDI BYPASS output is protected
by the bypass relay. When the relay is active, the SDI BYPASS output is
directly connected to the SDI input, and the SDI OUT output will have not
video output.
The 9 pin PARALLEL I/O connector has 1 general purpose input and 2
general purpose outputs. The GPI input is active low. This means that if
you leave an input floating (not connected) then it will not be activated.
Lowering the GPI input to a voltage below 0.8 volts will activate the input.
The user can activate GPIs simply by connecting the GPI input pins to
Ground using a button, switch, relay or an open collector transistor.
The outputs are internally pulled up to 5 volts. Care must be taken to limit
the load to 0.5W so there is no affect on the power supply source in the
frame.
Each I/O pin is electrically wired so it can be used as either an input or
output. When the pins are used as inputs, the software turns off the output
driver transistor. Figure 2-2 shows the circuitry for each of the I/O pins.
Revision 1.0
Page 2-4
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