Toshiba TC9349AFG Manual page 67

MUTE Output
This is the 1-bit CMOS output port for muting control and also used as P9-1 of the I/O port.
The MUTE output can be reversed by the output logic setting or changes in the I/O port.
1. MUTE Port
Y1 Y2 Y4
φL/K28
MUTE POL Break
The MUTE output is usually used for muting control.
The MUTE output is also used as the I/O port function pin (P9-1). The I/O port and MUTE output pin are switched by
the MUTE ENA bit. After a reset, this bit is set to "1" and becomes the MUTE output.
Data set to the MUTE bit is outputted to the MUTE output pin using positive or negative logic. By enabling the I/O port
break function (refer to the section on the input and output ports) and setting the break bit to "1", the MUTE bit can be set
to "1" each time the input of the I/O port is changed. This function promptly activates the muting state and prevents noise
from being generated in the linear circuit when the band is switched or the radio is turned off using the I/O port input.
POL bit sets up the logic of MUTE output. Set it up according to specifications.
This port is accessed by the OUT2/IN2 instruction with [CN = 8H] specified in the operand.
Note: During a system reset, the "L" level is outputted as the MUTE output. After the reset is released, the "H"
level is outputted. During execution of the clock stop instruction, the output becomes the "L" level. After
the instruction is released, the previous state is outputted.
Note: When the MUTE is controlled by the break function, the break pin sets the MUTE bit to "1". The state of
the MUTE bit can be checked at the MUTE bit (φK28). The state of the MUTE pin can be checked at the
P9-1, I/O port 9 input data port (φK38) .
Note: When the MUTE bit is set to "1", the electronic volume can be set to −∞dB. (→ Refer to the section on
Electronic volume.)
2. Circuit Composition of MUTE Output
Breakビット
Break bit
Break端子の入力変化の信号
Break pin input change signal
Y8
MUTE
ENA
/0
MUTE出力許可
MUTE output enabled
0 禁止(I/Oポート設定 P9-1) ：
0: Prohibition (I/O port setting: P9-1)
： 1 許可(ミュート出力)
1: Enabled (MUTE output)
Control by changes in the input state of the break pin
Break端子の入力状態の変化による制御
0: The MUTE output does not change when the input state of the break pin
0 Breakの入力状態が変化してもMUTE出力は変化しない ：
has changed.
1 Breakの入力状態の変化によりMUTEビットは"1"にセットされる ：
1: The MUTE bit is set to "1" when the input state of the break pin has
changed.
MUTE出力の極性の設定
MUTE output polarity setting
0 正論理・・・MUTEビットがそのまま出力される ：
0: Positive logic – The MUTE bit is outputted as is.
1 負論理・・・MUTEビットが反転して出力される ：
1: Negative logic – The Mute bit is outputted in a reversed state.
MUTE output setting
MUTE出力の設定
0: MUTE output becomes the "L" level in the positive logic and becomes the
0 MUTE出力は 正論理のとき"L"レベル 負論理のとき"H"レベルとなる ： 、
"H" level in the negative logic.
1 MUTE出力は 正論理のとき"H"レベル 負論理のとき"L"レベルとなる ： 、
1: MUTE output becomes the "H" level in the positive logic and becomes the
"L" level in the negative logic.
MUTEビット
MUTE bit
S
POL bit
POLビット
CKSTP instruction
リセット信号
Reset signal
67
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56 MUTE/P9-1
CKSTP命令
TC9349AFG
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2006-02-24