Toshiba TC9349AFG Manual page 65

Cmos digital integrated circuit silicon monolithic
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3. Break Setting and Pull-up/Pull-down Setting
16 pins of I/O ports 3, 4, 6 and 8 can be set as backup release pins (break pins). If there is a change in the input state of an
I/O port that has been set to input, the break pin releases execution of the WAIT or CKSTP instruction and restarts the CPU
operation. When the break bit of the MUTE port is "1", the MUTE bit is compulsorily set to "1" when there is a change in
the input state. (→ Refer to the section on MUTE output.)
Each pin of I/O port 3 can be programmed to a pull-down or pull-up state with 50 kΩ (standard) at the pull-up/pull-down
control port. Adjust settings at the pull-up/pull-down control ports that corresponds to the pins of I/O port 3.
φL/K1A
Y1
Y2
Y4
Y8
SEL1
SEL2
SEL4
SEL8
Data select
データセレクト
(9)
(A)
Note: BP3, BP4, BP6 and BP8 correspond to I/O ports 3, 4, 6 and 8 respectively. PU0/PD0, PU1/PD1,
PU2/PD2 and PU3/PD3 correspond to pins P3-0, P3-1, P3-2 and P3-3 respectively.
Note: Break is enabled only when the I/O port is programmed as an input port. The input pin that has been set
as a break pin must not be used at the intermediate level.
Note: Execution of the wait or clock stop instruction requires reading of the input of the I/O port to be released.
Note: When the serial interface function, the pulse counter function or the interruption input is used and break
is enabled, the wait or clock stop instruction is released due to change in the input of the pin. This
requires input setting at the I/O control port and reading of input of the I/O port before the instruction is
executed.
Note: I/O port 3 can be set to a pull-up or pull-down state when the serial interface function or the pulse
counter function is used.
φ L14 (Data port 4)
φL14 データポート
4)
Y1
Y2
Y4
Y8
I/Oポートブレーク許可
I/O port break enabled
BP3
BP4
BP6
BP8
I/Oポート3 プルアップ
I/O port 3 pull-up
PU0
PU1
PU2
PU3
I/Oポート3 プルダウン
I/O port 3 pull-down
(B)
PD0
PD1
PD2
PD3
65
TC9349AFG
ブレーク許可(I/Oポート単位)
Break enabled (for each I/O port)
プルアップ/ダウン設定
Pull-up/pull-down setting
PU
PD
端子状態
Pin state
0
0
プルアップ/ダウンオフ
Pull-up/pull-down off
0
1
プルダウン
Pull-down
1
*
プルアップ
Pull-up
: 0 禁止
0: Prohibition
1: Enabled
: 1 許可
2006-02-24

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