Toshiba TC9349AFG Manual page 37

Cmos digital integrated circuit silicon monolithic
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(2)
Detected power supply OFF function
Detected power supply OFF function detects the fact that the power supply is off during battery exchange or similar
procedures and actuates the backup state of the CPU circuit (V
If the detected power supply off function is enabled (BRAEK ENA bit (φL11(F)) = "1"), the V
0.5 V or less and all functions stop. At this time, the V
µA or less); the LCD output pin and CMOS output port change to "L" level; the N-channel open-drain pins are all
automatically fixed to the off (high-impedance) state; and the PLL changes to off mode. If the power supply is
switched on again, the CPU will operate after a standby interval of 100 ms. The V
whether the power supply has been switched off.
Note: Set the V
pin level to GND level during power supply off. If V
DD
will be consumed by the V
Note: The BRAEK ENA bit ( φ L11(F)) permits VDD power supply break and power supply off detection
function.
Note: Use this function together with the decreased voltage detection function.
(3)
Backup control register by hardware
Decreased voltage detection and power supply off detection function control are accomplished through access of the
decreased voltage control port (φL11(E), φL11(F)); the decreased voltage detection setting data port (φL16(D),
φK11(D)); and the flag register (φK26).
φL11(E) (decreased voltage control 1)
Y1
WAIT
ENA
Note: If the decreased voltage detection function is not being used, set the WAIT ENA bit to "0" for
reduced consumption current.
CPU
pin.
CPU
Y2
Y4
Y8
PLLoff
STOP
*
ENA
ENA
37
pin) to keep it on hold.
CPU
pin power supply changes to low current consumption (0.5
OFF F/F bit enables detection of
DD
level potential remains, current
DD
Permission for decreased voltage detection function
0: Prohibition Decreased voltage detection function suspended
1: Enable
Decreased voltage detection function operating
Permission for PLL stop function on decreased voltage detection
0: Prohibition
1: Enable
PLL off mode and PLL stop are executed
when decreased voltage is detected.
Permission for CPU stop function on decreased voltage detection
0: Prohibition
1: Enable
CPU stops when decreased voltage is detected.
(Note) Settings become invalid if the decreased voltage
detection function is suspended.
TC9349AFG
pin level is about
DD
2006-02-24

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