Toshiba TC9349AFG Manual page 66

Cmos digital integrated circuit silicon monolithic
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Pull-up and pull-down settings can be used to configure the key matrix. The key matrix is configured with usual I/O port
output as the output of the key matrix and the I/O port 3 that has been set to pull-down or pull-up as the key input. Setting
the key input to break enables restarting depending on the presence or absence of this key input when the CDSTP or WAIT
instruction is executed.
An example configuration of the key input matrix circuit is shown below.
VDD
40
P3-3
P3-2
39
P3-1
38
P3-0
37
36
P16-3
P16-2
35
P16-1
34
P16-0
33
キー入力マトリクス回路構成例
Example of key input matrix circuit
Note: After the CKSTP instruction is released by key input, there is a standby time of 100 ms. Pay close
attention to this time lag.
P3-3
P3-2
P3-1
P3-0
P16-3
P16-2
P16-1
P16-0
I/Oポート3の
I/O port 3
data loading
データ取り込み
66
TC9349AFG
プルアップ
Pull-up
プルアップ
Pull-up
P6-3とP3-1のキーが押された場合
P16-3 と P3-1 のキーが押された場合
When P16-3 and P3-1 keys are pressed
プルアップ
Pull-up
ハイインピーダンス
High impedance
2006-02-24

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