Toshiba TC9349AFG Manual page 105

Automatic phase difference switching mode (DO2 control 2 port: AUTO, ENA, CK0 and CK1 bits)
The DO2 pin has an automatic phase difference switching mode that switches the output resistance automatically;
depending on the phase difference. In this mode, the output resistance becomes higher as the phase difference pulse
becomes shorter, and vice versa. In other words, the system operates with a higher resistance in the lock state and
conversely, with a lower resistance in an unlocked state. By using this mode, the lock up time can be improved.
When the ENA bit is set to "1", the phase difference detection operation is enabled. When the AUTO bit is set to
"1", the DO2 output resistance switching is implemented.
Phase difference detection is implemented using the operation clock from the programmable counter circuit. This
clock counts the unlock state in the binary format. Four types of OSCin input, 1/2, 1/4, 1/8 and 1/16 can be selected
for this clock. The output resistance setting time can be switched by switching the clock. This control selects the
clock frequency using the CK0 and CK1 bits. Select the clock frequency depending on the lock up time. After locking,
turn off automatic switching and set the output resistance to fixed settings (R0 and R1 bits) as needed.
基準周波数 （ｆｒ）
Reference frequency (fr)
プログラマブル
Programmable counter カウンタ出力 （ｆｓ）
output (fs)
DO output
DO出力
位相誤差
Phase error
Phase difference detection clock
位相差検出クロック
DO2 output resistance state
DO2出力抵抗の状態
Output
出力抵抗値 resistance
value
100kΩ
50kΩ
5kΩ
0kΩ
When PN = "1" is selected, the PN output mode has priority.
Note:
Note: Effective only when the DO2 output mode setting is in the phase comparator output state.
td=1/fd
5
0kΩ
kΩ
50kΩ
＜ タイミング例ー １＞
＜Timing example 1＞
位相差抵抗期間
Phase difference resistance period
ｆｒ＜ｆｓ（ －１） 例 fr＞fs (Example-2) ｆｒ＞ｆｓ（ －２）
fr＜fs (Example-1)
ー 0 td/2 ～
0 0.5× ～ ｔｄ 0 1.5×td ～
0.5× ｔｄ～ｔｄ td 2.5× ～
td 2× ～ ｔｄ 2×td 2.5× ～
105
100kΩ
＜ タイミング例ー
＜Timing example 2＞
CK1 CK0
例 0 0
0 1
1 0
ｔｄ 1 1
ｔｄ
TC9349AFG
２＞
Phase difference
位相差検出クロック(fd)
detection clock (fd)
OSCin/2
OSCin/4
OSCin/8
OSCin/16
2006-02-24