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79
GND
81
B68_L16_N
83
B68_L16_P
85
B68_L18_N
87
B68_L18_P
89
GND
91
B68_L22_N
93
B68_L22_P
95
B68_L24_N
97
B68_L24_P
99
GND
101
B68_L13_N
103
B68_L13_P
105
B68_L14_N
107
B68_L14_P
109
GND
111
B68_L12_N
113
B68_L12_P
115
B68_L17_N
117
B68_L17_P
119
GND
J2 connector 80 Pin, connect the high speed differential signal of transceiver BANK226~228.
Pin assignment of J2 connector
J2
Signal Name
Pin
1
3
226_TX2_N
5
226_TX2_P
7
9
226_TX3_N
11
226_TX3_P
13
15
226_CLK1_N
17
226_CLK1_P
19
KINTEX UltraScale+ FPGA Board AXKU042User Manual
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F19
G19
H18
H19
-
J18
J19
L18
L19
-
G16
G17
F17
F18
-
E17
E18
H16
H17
-
FPGA Pin
GND
-
U3
U4
GND
-
R3
R4
GND
-
T5
T6
GND
-
80
GND
82
B68_L10_N
84
B68_L10_P
86
B68_L1_N
88
B68_L1_P
90
GND
92
B68_L3_N
94
B68_L3_P
96
B68_L5_N
98
B68_L5_P
100
GND
102
B68_L7_N
104
B68_L7_P
106
B68_L6_N
108
B68_L6_P
110
GND
112
B68_L2_N
114
B68_L2_P
116
B68_L4_N
118
B68_L4_P
120
GND
J2
Signal Name
Pin
2
GND
4
226_RX2_N
6
226_RX2_P
8
GND
10
226_RX3_N
12
226_RX3_P
14
GND
16
226_CLK0_N
18
226_CLK0_P
20
GND
http://www.alinx.com
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D18
D19
A14
B14
-
A15
B15
B16
B17
-
C14
D14
C17
C18
-
A18
A19
B19
C19
-
FPGA Pin
-
T1
T2
-
P1
P2
-
V5
V6
-
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