Expansion Busses - ADLINK Technology COM Express Express-ID7 User Manual

Express-ID7 User's Guide
Cache
15MB: D-1746TER, D-1735TR, D-1732TE
10MB: D-1715TER, D-1712TR
Embedded BIOS
AMI Aptio V UEFI with CMOS backup in 32 MB SPI BIOS, dual BIOS by build option

2.2. Expansion Busses

16 PCI Express Gen4: Lane 16-31 (four controllers, configurable to 1 x16, 2 x8, or 4 x4)
Refer to Ch. 4 Pinout and Signal Descriptions for details on Gen4 clock, PCIE_CK_REF1 (pin B29/B30)
8 PCI Express Gen3: Lanes 0-7 (four controllers, configurable to 1 x8, 2 x4, 4 x2/x1)
8 PCI Express Gen3: Lane 8-15 (four controllers, configurable to 1 x8, 2 x4, 4 x2/x1)
Note: Additional PCIe x1 at Lane 1 and Lane 5 are supported by build option and project basis.
PCIE_CK_REF (A88/A89) for Lane 16-31 (with up to Gen3 speed) is supported by build option and project basis.
Combined HSIO has a bandwidth up to the equivalent of 16 PCIe Gen3 lanes; PCIe lane 0-15, SATA, GbE and USB SSTX/RX are sourced
from HSIO.
Other: SMBus (system), I C (user), LPC bus
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