Appendix 2: Fractional Output Divider And Spread Spectrum - Renesas 9FGV100 Series User Manual

Table of Contents

Advertisement

Appendix 2: Fractional Output Divider and Spread Spectrum

Spread spectrum capability is contained within the Fractional-N output divider associated with OUT0 and OUT1. When applied, triangle
wave modulation of any spread spectrum amount, SS%AMT up to ±2.5% center spread and -5% down spread between 30 and 63kHz
may be generated, independent of the output clock frequency. Six variables define Spread Spectrum in the FOD (see
Table 5. Spread Spectrum Variables in the FOD
Name
SS Enable
Spread spectrum control enable
FOD Integer
Integer portion of the FOD
value P
FOD Fraction
Fractional portion of the FOD
value P
SS Period
Spread spectrum modulation
period
SS Step
Modulation step size
SS Jitter
Jitter Attenuator Configuration
Attenuator
Table 6. Spread Spectrum Jitter Attenuator Configuration
Output Frequency
15MHz ~ 30MHz
60MHz ~ 120MHz
120.0001MHz ~ 150MHz
150.0001MHz ~ 300MHz
Make sure to adjust the FOD output frequency based upon the Frequency Multiplier value of the Jitter Attenuator. This is only needed
when Spread Spectrum is enabled. Please consult the factory for output frequencies not covered by the ranges in
©2016 Integrated Device Technology, Inc.
Function
0x10 [7]
0x12 [7..0]
0x13 [7..0] = Fraction [15..8]
0x14 [7..0] = Fraction [7..0]
0x10 [3..0] = Period [11..8]
0x11 [7..0] = Period [7..0]
0x15 [7..0] = Step [15..8]
0x16 [7..0] = Step [7..0]
0x24 [1..0] = JA [1..0]
JA [1..0]
Frequency Multiplier
00
01
10
11
9FGV100x Register Descriptions and Programming Guide User Guide
RAM Register
FOD Frequency
× 0.25
60MHz ~ 120MHz
× 1
60MHz ~ 120MHz
× 1.25
96.0001MHz ~ 120MHz
× 2
75.0001MHz ~ 150MHz
11
Table
Note
When SS-Enable = 0, contents of Period
and Step registers are Don't Care.
When SS-Enable = 1, the SS Jitter
Attenuator will also enable.
See equations 4 and 5 below.
See equations 4 and 5 below.
Total 12 bits for the Period
Defined as half the reciprocal of the
modulation frequency and measured in
cycles of the FOD output frequency. See
equation 6 below.
Sets the time rate of change or time slope of
the output clock frequency. See equation 8
below.
The SS Jitter Attenuator needs to be
configured based upon the FOD output
frequency. The JA may divide down or
multiply up the frequency to the output.
Table
November 18, 2016
5).
6.

Advertisement

Table of Contents
loading

This manual is also suitable for:

9fgv10019fgv10029fgv1004

Table of Contents