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Register Address
Register Bit
Decimal
Hex
37
0x25
©2016 Integrated Device Technology, Inc.
7
Reserved
6
Enable Integer Output Dividers: 0 = Disabled , 1 = Enabled
5
Enable Crystal Frequency Doubler: 0 = Disabled , 1 = Enabled
4
Reserved
3
OUT3 Integer Divider Enable: 0 = Disabled , 1 = Enabled
2
OUT2 Integer Divider Enable: 0 = Disabled , 1 = Enabled
[1..0]
Reserved
9FGV100x Register Descriptions and Programming Guide User Guide
Function Explanation
8
November 18, 2016
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