Renesas 9FGV100 Series User Manual page 3

Table 3. RAM Overview
Register
Address
0x00 Device / I2C settings
0x01 REF Outputs settings
0x02
0x03 OUT3 output settings
0x04
0x05
0x06 OUT2 output settings
0x07
0x08
0x09 OUT1 output settings
0x0A
0x0B
0x0C OUT0 output settings
0x0D
0x0E
Crystal Oscillator settings
0x0F
0x10
FOD Spread Spectrum settings
0x11
0x12 FOD Integer Value
0x13
FOD Fractional Value
0x14
0x15
FOD Spread Spectrum settings
0x16
0x17
0x18 FOD Miscellaneous
0x19
0x1A
PLL Miscellaneous
0x1B
0x1C
0x1D PLL Loop Filter settings
0x1E
0x1F PLL Feedback Divider Value
0x20
0x21 Integer Output Divider Values
0x22
0x23 Reserved
0x24 Spread Spectrum Jitter Attenuator settings
0x25 Miscellaneous Device settings
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9FGV100x Register Descriptions and Programming Guide User Guide
Function Explanation
3 November 18, 2016