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5.4
Register overview
The registers are used for the parameterization of the Bus Terminals and are available for each channel.
They can be read or written by means of register communication [} 45].
Register no.
Comment
Raw ADC value
R0 [} 48]
Calibration value: Offset
R1 [} 48]
Calibration value: Gain
R2 [} 48]
R3
reserved
R4
reserved
R5
reserved
Diagnostic register
R6 [} 48]
Command register
R7 [} 48]
Terminal type
R8 [} 49]
Firmware version
R9 [} 49]
R10
Multiplex shift register
R11
Signal channels
minimum data length of a channel
R12 [} 49]
R13
Data structure
R14
reserved
R15
Alignment register
Hardware version number
R16 [} 49]
Vendor calibration: Offset
R17 [} 49]
Vendor calibration: Gain
R18 [} 49]
Manufacturer scaling: Offset
R19 [} 50]
Manufacturer scaling: Gain
R20 [} 50]
Upper limitation of the measuring
R21 [} 50]
range
Lower limitation of the measuring
R22 [} 50]
range
Reference calibration value: Offset
R23 [} 50]
Reference calibration value: Gain
R24 [} 50]
R25
reserved
...
reserved
R28
reserved
R29
Terminal type, special identifica-
tion
R30
reserved
Code word register
R31 [} 50]
Feature register
R32 [} 50]
KL31x2/KS31x2
Default value
0x0000
typically 0x0046
typically 0xF1CC
-
-
-
0x0000
0x0000
KL3132:
0xC3C
KL3142:
0xC46
KL3152:
0xC50
KL3162:
0xC5A
KL3172:
0x0C64
KL3182:
0x0C6E
e.g. 0x3141
0x0218 / 0x0130
0x0218
0x0098
0x0007
-
typically 0x7F80
e.g. 0x0000
typically 0x0046
typically 0x5208
0x0000
KL3162, KL3172,
0x0100
KL3142, KL3152:
KL3132, KL3182:
0x0080
KL3162, KL3172,
0xFFFF
KL3142, KL3152:
KL3132, KL3182:
0x7FFF
KL3162, KL3172,
0x0000
KL3142, KL3152:
KL3132, KL3182:
0x8000
typically 0x0046
typically 0xF1CC
-
-
-
KL3132-0000
0x0000
KL3142-0000
0x0000
KL3152-0000
0x0000
KL3162-0000
0x0000
KL3172-0000
0x0000
KL3172-0500
0x01F4
KL3172-1000
0x03E8
KL3182-0000
0x0000
-
0x0000
KL3162, KL3172,
0x0180
KL3142, KL3152:
KL3132, KL3182:
0x0182
Version: 2.6.0
Data structures
R/W
Memory
0
R
RAM
dec
typically 70
R
RAM
dec
typically 61900
R
RAM
dec
-
-
-
-
-
-
-
-
-
0
R
RAM
dec
0
R/W
RAM
dec
3132
R
ROM
dec
3142
dec
3152
dec
3162
dec
3172
dec
3182
dec
e.g. 12609
R
ROM
dec
536
/ 304
R
ROM
dec
dec
536
R
ROM
dec
152
R
ROM
dec
7
R
ROM
dec
-
-
-
typically 32,640
R/W
RAM
dec
e.g. 0
R/W
SEEPROM
dec
70
R/W
SEEPROM
dec
typically 21000
R/W
SEEPROM
dec
0
R/W
SEEPROM
dec
256
R/W
SEEPROM
dec
128
dec
65535
R/W
SEEPROM
dec
+32767
dec
0
R/W
SEEPROM
dec
-32768
dec
typically 70
R/W
SEEPROM
dec
typically 61900
R/W
SEEPROM
dec
-
-
-
-
-
-
-
-
-
0
R
ROM
dec
0
dec
0
dec
0
dec
0
dec
500
dec
1000
dec
0
dec
-
-
-
0
R/W
RAM
dec
384
R/W
SEEPROM
dec
386
dec
47
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