Ipr Interrupt Priority Register - Samsung S3C80M4/F80M4 User Manual

8-bit cmos microcontrollers
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CONTROL REGISTERS
IPR
— Interrupt Priority Register
Bit Identifier
RESET Value
Read/Write
Addressing Mode
.7, .4, and .1
.6
.5
.3
.2
.0
NOTE: Interrupt group A - IRQ0, IRQ1
Interrupt group B -IRQ2, IRQ3, IRQ4
Interrupt group C -IRQ5, IRQ6, IRQ7
4-10
.7
.6
x
x
R/W
R/W
Register addressing mode only
Priority Control Bits for Interrupt Groups A, B, and C
0
0
0
Group priority undefined
0
0
1
B > C > A
0
1
0
A > B > C
0
1
1
B > A > C
1
0
0
C > A > B
1
0
1
C > B > A
1
1
0
A > C > B
1
1
1
Group priority undefined
Interrupt Subgroup C Priority Control Bit
0
IRQ6 > IRQ7
1
IRQ7 > IRQ6
Interrupt Group C Priority Control Bit
0
IRQ5 > (IRQ6, IRQ7)
1
(IRQ6, IRQ7) > IRQ5
Interrupt Subgroup B Priority Control Bit
0
IRQ3 > IRQ4
1
IRQ4 > IRQ3
Interrupt Group B Priority Control Bit
0
IRQ2 > (IRQ3, IRQ4)
1
(IRQ3, IRQ4) > IRQ2
Interrupt Group A Priority Control Bit
0
IRQ0 > IRQ1
1
IRQ1 > IRQ0
.5
.4
.3
x
x
R/W
R/W
R/W
S3C80M4/F80M4
FFH
Set 1, Bank 0
.2
.1
x
x
x
R/W
R/W
.0
x
R/W

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