Samsung S3C80M4/F80M4 User Manual page 206

I/O PORTS
9-4
Port 0 Interrupt Control Register (P0INT)
F4H, Set 1, Bank 0, R/W
MSB .7 .6 .5
INT3 INT2
P0INT bit configuration settings:
00 Disable interrupt
01 Enable interrupt by falling edge
10 Enable interrupt by rising edge
11 Enable interrupt by both falling and rising edge
Figure 9-3. Port 0 Interrupt Control Register
Port 0 Interrupt Pending Register (P0PND)
F5H, Set 1, Bank 0, R/W
MSB .7 .6 .5
Not used for the S3C80M4
P0PND bit configuration settings:
0 Interrupt request is not pending,
pending bit clear when write 0
1 Interrupt request is pending
Figure 9-4. Port 0 Interrupt Pending Register (P0PND)
.4 .3 .2 .1
INT1 INT0
.4 .3 .2 .1
PND3 PND2 PND1 PND0
S3C80M4/F80M4
.0 LSB
.0 LSB