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AD8450-EVALZ/ADP1972-EVALZ User Guide
EVALUATION BOARD HARDWARE
SETTING UP THE EVALUATION SYSTEM
Figure 26 to Figure 29 show the analog control board schematic,
and Figure 17 shows the power stage board schematic.
The analog control board includes the
ADP1972
(U2), the
AD7173-8
AD5689R
16-bit DAC (U8).
The 32-pin header connector mates with the power stage board
and includes the PWM control signals for the MOSFET drivers,
as well as the battery voltage, the current signals, and the supply
voltage for the analog control board. The modular approach of
the system allows users to use the analog control board with
their custom design power stage. Table 1 lists the header pin
names and functionalities.
The power stage board includes an
(U1), an
ADP2441
buck regulator (U2) to power the MOFSET
driver, a high-side and low-side power MOSFET, parallel Schottky
diodes, and input/output capacitors.
Connect the boards as shown in Figure 2.
POWERING THE SYSTEM
The evaluation system requires power from an external dc
power source. The nominal input voltage is 12 V, connected
through the banana input terminals labeled J2 and J4 on the
power stage board. The input current depends on the desired
load current (that is, battery charge current). To run the board
at the rated 20 A charge current into a 5 V load, the input 12 V
power supply must be capable of delivering at least 9.5 A.
The analog control board receives power through the 32-pin
connector. However, this board also includes the J3 screw
terminal connector, if the user wants to power the board
separately. To power the analog control board independently
of the power stage board, remove Resistor R108 and populate a
0 Ω jumper at R130.
To turn on the board, apply power as described previously and
move Switch SW1 on the power stage board to the on position.
AD8450
COMPENSATION NETWORKS
The evaluation system ships configured for connection to a
Chroma 63600 series electronic load. If the electronic load of
the user has a different response, or if the user wants to use the
system with a rechargeable battery, adjust the compensation values
in each of the four
AD8450/AD8451
system stability. Use the online
design tool at http://analogplayground.com/AD8450, and see
the
AN-1319
for detailed analysis.
AD8450
(U1), the
24-bit Σ-Δ ADC (U5), and the
ADuM7223
MOFSET driver
control loops to ensure
AD8450/AD8451
compensator
SERIAL INTERFACE
The evaluation system uses the SPI interface on the SDP-S board
to read the current and voltage ADCs, and to set the current and
voltage set points with the
Table 1. 32-Pin Board to Board Connector Pinout
Pin No.
1
2, 11 to 16, 18,
19, 20 to 24
3
4
5
6
7
8
9
10
17
33 to 36
37
38
39
40
Rev. 0 | Page 5 of 33
AD5689R
DAC.
Name
Description
BUS_PWR
Supply rail from power stage board
DGND
Digital ground
+12V
Supply rail to power stage board
DH
High-side driver signal
DL
Low-side driver signal
MODE
Selects between charge/discharge
mode
EN_PWR
Enable signal for power stage
Fault
Fault detection from
CL
Current-limit sense line to
CL_SENSE
Current-limit ground sense line to
ADP1972
SYNC_PWR
Sync pin to and from
AGND
Analog ground
CS+
Sense line from current sense
resistor
CS−
Sense line from current sense
resistor
VS+
Sense line from battery positive (+)
terminal
VS−
Sense line from battery negative (−)
terminal
UG-845
ADP1972
ADP1972
ADP1972
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