Ina260Evm Pcb Description - Texas Instruments INA260EVM-PDK Instruction Manual

INA260EVM-PDK Hardware

2.2 INA260EVM PCB Description

Figure 2-3 depicts a block diagram of the INA260EVM PCB highlighting the power supplies, analog inputs, and
digital I/O signals.
The EVM PCB requires minimal instrumentation to be operated. In fact, the only pieces of required equipment
not included in the kit are a ( Windows
the SM-USB-DIG board, via the 10-pin connector socket, J4.
PIN ON J4
10
9
8
7
6
5
4
3
2
1
(1) When V is Hi-Z, all digital I/Os are Hi-Z as well.
DUT
2.2.1 EVM Power Supply
The INA260EVM PCB uses the V
voltages for the INA260. As noted in
EVM supply voltage is user-selectable through the GUI. Place the 1-µF ceramic capacitor (C2) in close proximity
to the INA260 supply pin (U1) to provide adequate decoupling to V
frequencies.
8 INA260EVM-PDK (Rev A)
IN+
T1
V
BUS
J1
INA260
IN-
T2
J2, J3
Figure 2-3. INA260EVM Block Diagram
®
7) computer and an input current source. All other inputs are supplied by
Table 2-1. Signal Definition of J4 on INA260EVM Board
SIGNAL
I2C_SCL
CTRL/MEAS4
I2C_SDA1
CTRL/MEAS5
SPI_DOUT1
V
DUT
SPI_CLK
GND
SPI_CS1
SPI_DIN1
and GND lines from the SM-USB-DIG (via J4) as the high and low supply
DUT
Table 2-1, the available supply voltages for V
Copyright © 2023 Texas Instruments Incorporated
V Supply
DUT
2
I C interface
J4
GND
Table 2-1 lists the pinout for J4.
DESCRIPTION
2
I C clock signal (SCL)
GPIO: control output or measure input
2
I C data signal (SDA)
GPIO: control output or measure input
SPI data output (MOSI)
Switchable DUT power supply: 3.3 V, 5 V, Hi-Z
(disconnected)
SPI clock signal (SCLK)
Power return (GND)
SPI chip-select signal ( CS)
SPI data input (MISO)
are 5 V and 3.3 V. The
DUT
for power supply rejection at higher
DUT
SBOU180A – NOVEMBER 2016 – REVISED MARCH 2023
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(1)
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