Marvell 88E3015 Manual page 85

Integrated 10/100 fast ethernet transceiver
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Table 56:
MAC Interface Output Impedance Calibration Override
Register 30_10
B i ts
F i e l d
15
Restart Calibra-
tion
14
Calibration
Complete
13
Reserved
12:8
PMOS Value
7
Reserved
6
LATCH
5
PMOS/NMOS
Select
4:0
NMOS value
Copyright © 2008 Marvell
January 4, 2008, Advance
M o d e
H W
S W
R s t
R s t
R/W,
0x0
Retain
SC
RO
0x0
Retain
R/W
0x0
Retain
R/W
See
Retain
Descr
RW
0x0
Retain
R/W,
0x0
Retain
SC
R/W
0x0
Retain
R/W
See
Retain
Descr
Document Classification: Proprietary Information
D e s c r i p t io n
Calibration will start once bit 15 is set to 1.
0 = Normal
1 = Restart
Calibration is done once bit 14 becomes 1.
0 = Not done
1 = Done
0
00000 = all fingers off
11111 = all fingers on
The automatic calibrated values are stored here after
calibration completes.
Once LATCH is set to 1 the new calibration value is writ-
ten into the I/O pad. The automatic calibrated value is
lost.
0
1 = Latch in new value. This bit self clears.
(Used for manual settings)
0 = NMOS value written when LATCH is set to 1.
1 = PMOS value written when LATCH is set to 1.
00000 = All fingers off
11111 = All fingers on
The automatic calibrated values are stored here after
calibration completes.
Once LATCH is set to 1 the new calibration value is writ-
ten into the I/O pad. The automatic calibrated value is
lost.
Doc. No. MV-S103657-00, Rev. D
Register Description
Page 85

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