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88E3015/88E3018
Integrated 10/100 Fast Ethernet Transceiver
10 Mbps RGMII Receive Timing
(Over full range of values listed in the Recommended Operating Conditions unless otherwise specified)
Symbol
Para meter
T
RGMII Output to Clock
SU_RGMII_
RX_CLK
T
RGMII Clock to Output
HD_RGMII_
RX_CLK
T
RX_CLK High
H_RGMII_
RX_CLK
T
RX_CLK Low
L_RGMII_
RX_CLK
T
RX_CLK Period
P_RGMII_
RX_CLK
Figure 24: RGMII RX_CLK Delay Timing - Register 28.11:10 = 01 (add delay)
RXD[3:0], RX_CTL
Doc. No. MV-S103657-00, Rev. D
Page 104
Condition
t
RX_CLK
l_rgmii_rx_clk
t
hd_rgmii_rx_clk
t
su_rgmii_rx_clk
Document Classification: Proprietary Information
Min
Typ
Ma x
80
80
190
200
210
190
200
210
400
t
p_rgmii_rx_clk
t
h_rgmii_rx_clk
t
hd_rgmii_rx_clk
t
su_rgmii_rx_clk
Copyright © 2008 Marvell
January 4, 2008, Advance
Units
ns
ns
ns
ns
ns
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