Marvell 88E3015 Manual page 18

Integrated 10/100 fast ethernet transceiver
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88E3015/88E3018
Integrated 10/100 Fast Ethernet Transceiver
Table 9:
Regulator & Reference
8 8E301 5
88E30 18
28
33
10
12
15
17
Table 10:
Test
88 E3015
88E30 18
31
36
30
35
27
32
Doc. No. MV-S103657-00, Rev. D
Page 18
Pin Name
Ty pe
RSET
I
DIS_REG12
I
CTRL25
O
Pin Nam e
Typ e
HSDACP
O
HSDACN
O
TSTPT
O
Document Classification: Proprietary Information
Des cription
Constant voltage reference.
External 2 kohm 1% resistor connection to VSS is
required for this pin.
1.2V Regulator Disable.
Tie to VDDO to disable, Tie to VSS to enable.
2.5V Regulator Control.
This signal ties to the base of the BJT. If the 2.5V
regulator is not used it can be left floating.
De scr ip tio n
Test Pin.
These pins have 49.9 ohm internal termination.
They should be brought out to a via or pad to facili-
tate debug. If debug is not important and there are
board space constraints, this pin can be left float-
ing.
Test Pin.
These pins have 49.9 ohm internal termination.
They should be brought out to a via or pad to facili-
tate debug. If debug is not important and there are
board space constraints, this pin can be left float-
ing.
Test point. Leave unconnected.
Copyright © 2008 Marvell
January 4, 2008, Advance

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