Marvell 88E3015 Manual page 73

Integrated 10/100 fast ethernet transceiver
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Table 43:
PHY Specific Status Register (Continued)
Register 17
B i ts
F i e l d
3:2
Reserved
1
RTPolarity
0
RTJabber
Table 44:
PHY Interrupt Enable
Register 18
B i ts
F i e l d
15
Reserved
14
SpeedIntEn
13
DuplexIntEn
12
RxPageIntEn
11
AnegDone
IntEn
10
LinkIntEn
9
SymErrIntEn
8
FlsCrsIntEn
7
FIFOErrInt
Copyright © 2008 Marvell
January 4, 2008, Advance
M o d e
H W
S W
R s t
R s t
RES
Always
Always
00
00
RO
0x0
0x0
RO
0x0
Retain
M o d e
H W
S W
R s t
R s t
R/W
0x0
Retain
R/W
0x0
Retain
R/W
0x0
Retain
R/W
0x0
Retain
R/W
0x0
Retain
R/W
0x0
Retain
R/W
0x0
Retain
R/W
0x0
Retain
R/W
0x0
Retain
Document Classification: Proprietary Information
D e s c r i p t io n
Always 00.
Polarity (real time)
0 = Normal
1 = Reversed
Jabber (real time)
0 = No Jabber
1 = Jabber
D e s c r i p t io n
0
Speed Changed Interrupt Enable
0 = Interrupt disable
1 = Interrupt enable
Duplex Changed Interrupt Enable
0 = Interrupt disable
1 = Interrupt enable
Page Received Interrupt Enable
0 = Interrupt disable
1 = Interrupt enable
Auto-Negotiation Completed Interrupt Enable
0 = Interrupt disable
1 = Interrupt enable
Link Status Changed Interrupt Enable
0 = Interrupt disable
1 = Interrupt enable
Symbol Error Interrupt Enable
0 = Interrupt disable
1 = Interrupt enable
False Carrier Interrupt Enable
0 = Interrupt disable
1 = Interrupt enable
FIFO Over/Underflow Interrupt Enable
0 = Interrupt disable
1 = Interrupt enable
Doc. No. MV-S103657-00, Rev. D
Register Description
Page 73

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