Marvell Alaska Ultra 88E1111 Product Brief
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Marvell Alaska Ultra 88E1111 Product Brief

Integrated 10/100/1000 gigabit ethernet transceiver
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88E1111 Product Brief
Integrated 10/100/1000 Ultra
Gigabit Ethernet Transceiver
Marvell.
Moving Forward Faster
Doc. No. MV-S105540-00, Rev. --
March 4, 2009
Document Classification: Proprietary Information

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Summary of Contents for Marvell Alaska Ultra 88E1111

  • Page 1 88E1111 Product Brief Integrated 10/100/1000 Ultra Gigabit Ethernet Transceiver Doc. No. MV-S105540-00, Rev. -- March 4, 2009 Document Classification: Proprietary Information Marvell. Moving Forward Faster...
  • Page 2 No part of this document may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, for any purpose, without the express written permission of Marvell. Marvell retains the right to make changes to this document at any time, without notice. Marvell makes no warranty of any kind, expressed or implied, with regard to any information contained in this document, including, but not limited to, the implied warranties of merchantability or fitness for any particular purpose.
  • Page 3 CAT 5 unshielded twisted pair. • Four RGMII timing modes The 88E1111 device incorporates the Marvell Virtual • Energy Detect and Energy Detect+ low power ® Cable Tester (VCT™) feature, which uses Time...
  • Page 4 3-Speed Device Serial Interface MAC Interface Options - 4-pin SGMIII - GMII - RGMII 88E1111 RGMII/GMII MAC to SGMII MAC Conversion Doc. No. MV-S105540-00, Rev. -- Copyright © 2009 Marvell Page 4 Document Classification: Proprietary Information March 4, 2009, Advance...

  • Page 5: Table Of Contents

    Ordering Part Numbers and Package Markings............45 3.1.1 RoHS 5/6 Compliant Marking Examples ................46 3.1.2 RoHS 6/6 Compliant Marking Examples ................49 Copyright © 2009 Marvell Doc. No. MV-S105540-00, Rev. -- March 4, 2009, Advance Document Classification: Proprietary Information Page 5...

  • Page 6: 117-Pin Tfbga Package

    HSDAC- AVDD AVDD TRSTn MDI[0]+ MDI[0]- MDI[1]+ MDI[1]- AVDD MDI[2]+ MDI[2]- MDI[3]+ MDI[3]- Figure 2: Pin A1 Location Pin A1 location Doc. No. MV-S105540-00, Rev. -- Copyright © 2009 Marvell Page 6 Document Classification: Proprietary Information March 4, 2009, Advance...

  • Page 7: 96-Pin Bcc Package

    AVDD RXD6 AVDD VDDO MDI[1]- RXD5 MDI[1]+ RXD4 AVDD RXD3 MDI[0]- RXD1 RSET RXD2 MDI[0]+ RX_DV RESETn RXD0 COMA VDDOX VDDO Copyright © 2009 Marvell Doc. No. MV-S105540-00, Rev. -- March 4, 2009, Advance Document Classification: Proprietary Information Page 7...

  • Page 8: 128-Pin Pqfp Package

    DVDD AVDD 88E1111 - RCJ RXD7 MDI[1]- RXD6 MDI[1]+ VDDO RXD5 AVDD RXD4 Top View RXD3 MDI[0]- RXD2 MDI[0]+ RXD1 RSET Doc. No. MV-S105540-00, Rev. -- Copyright © 2009 Marvell Page 8 Document Classification: Proprietary Information March 4, 2009, Advance...

  • Page 9: Pin Description

    Input and output Input only Output only Internal pull up Internal pull down Open drain output Tri-state output DC sink capability Copyright © 2009 Marvell Doc. No. MV-S105540-00, Rev. -- March 4, 2009, Advance Document Classification: Proprietary Information Page 9...
  • Page 10 In MDIX configuration, MDI[1]± are used for the transmit pair. MDI[1]± should be tied to ground if not used. Doc. No. MV-S105540-00, Rev. -- Copyright © 2009 Marvell Page 10 Document Classification: Proprietary Information March 4, 2009, Advance...
  • Page 11 In MDIX configuration, MDI[3]± correspond to BI_DC±. In 100BASE-TX and 10BASE-T modes, MDI[3]± are not used. MDI[3]± should be tied to ground if not used. Copyright © 2009 Marvell Doc. No. MV-S105540-00, Rev. -- March 4, 2009, Advance Document Classification: Proprietary Information Page 11...
  • Page 12 TX_ER is synchronous to GTX_CLK, and synchronous to TX_CLK in 100BASE-TX and 10BASE-T modes. Doc. No. MV-S105540-00, Rev. -- Copyright © 2009 Marvell Page 12 Document Classification: Proprietary Information March 4, 2009, Advance...
  • Page 13 When RX_ER is asserted with RX_DV de- asserted, a false carrier or carrier extension symbol is detected on the cable. RX_ER is synchronous to RX_CLK. Copyright © 2009 Marvell Doc. No. MV-S105540-00, Rev. -- March 4, 2009, Advance Document Classification: Proprietary Information...
  • Page 14 (SQE). SQE can be disabled by clearing reg- ister 16.2 to zero. COL is asynchronous to RX_CLK, GTX_CLK, and TX_CLK. Doc. No. MV-S105540-00, Rev. -- Copyright © 2009 Marvell Page 14 Document Classification: Proprietary Information March 4, 2009, Advance...
  • Page 15 TBI Receive Data code group bit 8. In the RXD8 TBI mode, RX_DV is used as RXD8. RXD[9:0] are synchronous to RCLK0 and RCLK1. Copyright © 2009 Marvell Doc. No. MV-S105540-00, Rev. -- March 4, 2009, Advance Document Classification: Proprietary Information Page 15...
  • Page 16 If this feature is not used, the COL pin should be driven low on the board. This pin should not be left floating in TBI mode. Doc. No. MV-S105540-00, Rev. -- Copyright © 2009 Marvell Page 16 Document Classification: Proprietary Information March 4, 2009, Advance...
  • Page 17 In RGMII 10/100BASE-T modes, the receive data nibble is presented on RXD[3:0] on the rising edge of RX_CLK. RXD[3:0] are synchronous to RX_CLK. Copyright © 2009 Marvell Doc. No. MV-S105540-00, Rev. -- March 4, 2009, Advance Document Classification: Proprietary Information...
  • Page 18 4 presented on the rising edge of RX_CLK, and bit 9 presented on the fall- ing edge of RX_CLK. Doc. No. MV-S105540-00, Rev. -- Copyright © 2009 Marvell Page 18 Document Classification: Proprietary Information March 4, 2009, Advance...
  • Page 19 26.2:0. The output impedance default setting is determined by the 75/50 OHM configura- tion pin. Copyright © 2009 Marvell Doc. No. MV-S105540-00, Rev. -- March 4, 2009, Advance Document Classification: Proprietary Information Page 19...
  • Page 20 RXD[3] O, Z Serial MAC interface Copper Link Status[1] connection. 1 = Copper link up 0 = Copper link down Doc. No. MV-S105540-00, Rev. -- Copyright © 2009 Marvell Page 20 Document Classification: Proprietary Information March 4, 2009, Advance...
  • Page 21 O, Z Serial MAC interface PHY_SIGDET[0] con- nection. 1 = S_OUT± invalid 0 = S_OUT± valid code groups according to clause 36 Copyright © 2009 Marvell Doc. No. MV-S105540-00, Rev. -- March 4, 2009, Advance Document Classification: Proprietary Information Page 21...
  • Page 22 (SDA). This pin is open-drain and may be wire-ORed with any number of open-drain devices. Doc. No. MV-S105540-00, Rev. -- Copyright © 2009 Marvell Page 22 Document Classification: Proprietary Information March 4, 2009, Advance...
  • Page 23 LED_LINK1000 indicates link status. LED_LINK1000 is a multi-function pin used to configure the 88E1111 device at the de- assertion of hardware reset. Copyright © 2009 Marvell Doc. No. MV-S105540-00, Rev. -- March 4, 2009, Advance Document Classification: Proprietary Information Page 23...
  • Page 24 High = Fiber Link down LED_DUPLEX is a multi-function pin used to configure the 88E1111 device at the de- assertion of hardware reset. Doc. No. MV-S105540-00, Rev. -- Copyright © 2009 Marvell Page 24 Document Classification: Proprietary Information March 4, 2009, Advance...
  • Page 25 Blink = Transmitting or receiving LED_TX is a multi-function pin used to con- figure the 88E1111 device at the de-asser- tion of hardware reset. Copyright © 2009 Marvell Doc. No. MV-S105540-00, Rev. -- March 4, 2009, Advance Document Classification: Proprietary Information...
  • Page 26 5 TCK pulses, or by pulling this pin low by a 4.7 kohm resistor. O, Z Boundary scan test data output. Doc. No. MV-S105540-00, Rev. -- Copyright © 2009 Marvell Page 26 Document Classification: Proprietary Information March 4, 2009, Advance...
  • Page 27 CONFIG[2] pin must be tied to one of the pins based on the configuration options selected. They should not be left floating. Copyright © 2009 Marvell Doc. No. MV-S105540-00, Rev. -- March 4, 2009, Advance Document Classification: Proprietary Information...
  • Page 28 There is no option for a 125 MHz crystal. See “Crystal Oscillator” Application Note for details. Doc. No. MV-S105540-00, Rev. -- Copyright © 2009 Marvell Page 28 Document Classification: Proprietary Information March 4, 2009, Advance...
  • Page 29 In COMA mode, the PHY cannot wake up on its own by detecting activity on the CAT 5 cable. Copyright © 2009 Marvell Doc. No. MV-S105540-00, Rev. -- March 4, 2009, Advance Document Classification: Proprietary Information...
  • Page 30 P i n # Ty pe RSET Analog Constant voltage reference. External 5.0 kohm 1% resistor connection to VSS required for each pin. Doc. No. MV-S105540-00, Rev. -- Copyright © 2009 Marvell Page 30 Document Classification: Proprietary Information March 4, 2009, Advance...
  • Page 31 2.5V Supply for the MDC/MDIO, INTn, 125CLK, RESETn, JTAG pin Power. VDDO Power 2.5V I/O supply for the MAC interface pins. Copyright © 2009 Marvell Doc. No. MV-S105540-00, Rev. -- March 4, 2009, Advance Document Classification: Proprietary Information Page 31...
  • Page 32 Ground reference for XTAL1 and XTAL2 pins. This pin must be connected to the ground. No connect. Do not connect these pins to anything Doc. No. MV-S105540-00, Rev. -- Copyright © 2009 Marvell Page 32 Document Classification: Proprietary Information March 4, 2009, Advance...

  • Page 33: I/O State At Various Test Or Reset Modes

    1 = Low 1 = Low 1 = Low can be either 1 = Low high or low 0 = Low Copyright © 2009 Marvell Doc. No. MV-S105540-00, Rev. -- March 4, 2009, Advance Document Classification: Proprietary Information Page 33...

  • Page 34: 117-Pin Tfbga Pin Assignment List - Alphabetical By Signal Name

    RXD4 DVDD RXD5 DVDD RXD6 DVDD RXD7 GTX_CLK RX_CLK HSDAC- RX_DV HSDAC+ RX_ER INTn S_CLK- LED_DUPLEX S_CLK+ LED_LINK10 S_IN- LED_LINK100 S_IN+ Doc. No. MV-S105540-00, Rev. -- Copyright © 2009 Marvell Page 34 Document Classification: Proprietary Information March 4, 2009, Advance...
  • Page 35 TXD1 TXD2 TXD3 TXD4 TXD5 TXD6 TXD7 TX_CLK TX_EN TX_ER VDDO VDDO VDDO VDDOH VDDOH VSSC VDDOH XTAL1 VDDOX XTAL2 VDDOX Copyright © 2009 Marvell Doc. No. MV-S105540-00, Rev. -- March 4, 2009, Advance Document Classification: Proprietary Information Page 35...

  • Page 36: 96-Pin Bcc Pin Assignment List - Alphabetical By Signal Name

    RXD3 DVDD RXD4 DVDD RXD5 DVDD RXD6 DVDD RXD7 GTX_CLK RX_CLK HSDAC- RX_DV HSDAC+ RX_ER INTn S_CLK- LED_DUPLEX S_CLK+ LED_LINK10 S_IN- Doc. No. MV-S105540-00, Rev. -- Copyright © 2009 Marvell Page 36 Document Classification: Proprietary Information March 4, 2009, Advance...
  • Page 37 VDDO VDDO VDDO VDDO VDDOH TRSTn VDDOH TXD0 VDDOH TXD1 VDDOX TXD2 VDDOX TXD3 TXD4 VSSC TXD5 XTAL1 TXD6 XTAL2 TXD7 Copyright © 2009 Marvell Doc. No. MV-S105540-00, Rev. -- March 4, 2009, Advance Document Classification: Proprietary Information Page 37...

  • Page 38: 128-Pin Pqfp Pin Assignment List - Alphabetical By Signal Name

    RX_DV DVDD RX_ER DVDD RXD0 DVDD RXD1 DVDD RXD2 DVDD RXD3 DVDD RXD4 DVDD RXD5 GTX_CLK RXD6 HSDAC+ RXD7 HSDAC- S_CLK+ Doc. No. MV-S105540-00, Rev. -- Copyright © 2009 Marvell Page 38 Document Classification: Proprietary Information March 4, 2009, Advance...
  • Page 39 TX_ER TXD0 TXD1 TXD2 TXD3 TXD4 TXD5 TXD6 TXD7 VDDO VDDO VDDO VDDO VDDOH VDDOH VDDOH VDDOX VSSC VDDOX XTAL1 XTAL2 Copyright © 2009 Marvell Doc. No. MV-S105540-00, Rev. -- March 4, 2009, Advance Document Classification: Proprietary Information Page 39...

  • Page 40: 117-Pin Tfbga Package

    88E1111 Product Brief Integrated 10/100/1000 Ultra Gigabit Ethernet Transceiver Section 2. Package Mechanical Dimensions 2.1 117-pin TFBGA Package (All dimensions in mm.) Doc. No. MV-S105540-00, Rev. -- Copyright © 2009 Marvell Page 40 Document Classification: Proprietary Information March 4, 2009, Advance...
  • Page 41 2. PRIMARY DATUM C AND SEATING PLANE ARE DEFINED BY THE SPHERICAL CROWNS OF THE SOLDER BALLS. 3. DIMENSION b IS MEASURED AT THE MAXIMUM SOLDER BALL DIAMETER, PARALLEL TO PRIMARY DATUM C. Copyright © 2009 Marvell Doc. No. MV-S105540-00, Rev. -- March 4, 2009, Advance Document Classification: Proprietary Information...

  • Page 42: 96-Pin Bcc Package - Top View

    2.2 96-pin BCC Package - Top View PIN 1 CORNER 9.00±0.10 C0.2 0.400±0.05 0.08 Z X Y DETAIL "A" (1X) 0.15 TOP VIEW 0.20 0.05 Doc. No. MV-S105540-00, Rev. -- Copyright © 2009 Marvell Page 42 Document Classification: Proprietary Information March 4, 2009, Advance...

  • Page 43: 96-Pin Bcc Package - Bottom View

    0.60±0.10 ''A'' (PIN 1 CORNER) 0.600 TYP. 4.800 CL.(PKG.) "B" 0.30±0.05 7.00 0.08 7.200 8.20 DETAIL "B" (95X) 9.00 BOTTOM VIEW Copyright © 2009 Marvell Doc. No. MV-S105540-00, Rev. -- March 4, 2009, Advance Document Classification: Proprietary Information Page 43...

  • Page 44: 128-Pin Pqfp Package

    ± 14.00 0.10 ± 17.20 0.20 PIN1 INDICATOR 1.6 Nominal 3.40 Max ± ± 0.25 0.22 0.05 0.88 0.15 0.5 Basic Doc. No. MV-S105540-00, Rev. -- Copyright © 2009 Marvell Page 44 Document Classification: Proprietary Information March 4, 2009, Advance...

  • Page 45: Ordering Part Numbers And Package Markings

    Section 3. Order Information 3.1 Ordering Part Numbers and Package Markings ® Figure 5 shows the ordering part numbering scheme for the 88E1111 devices. Contact Marvell FAEs or sales representatives for complete ordering information. Figure 5: Sample Part Number 88E1111 –...

  • Page 46: Rohs 5/6 Compliant Marking Examples

    Industrial Grade Package Marking Pin 1 location Note: The above example is not drawn to scale. Location of markings is approximate. Doc. No. MV-S105540-00, Rev. -- Copyright © 2009 Marvell Page 46 Document Classification: Proprietary Information March 4, 2009, Advance...
  • Page 47 @ = Assembly location code Industrial Grade Package Marking Pin 1 location Note: The above example is not drawn to scale. Location of markings is approximate. Copyright © 2009 Marvell Doc. No. MV-S105540-00, Rev. -- March 4, 2009, Advance Document Classification: Proprietary Information...
  • Page 48 @ = Assembly location code Pin 1 location Note: The above example is not drawn to scale. Location of markings is approximate. Doc. No. MV-S105540-00, Rev. -- Copyright © 2009 Marvell Page 48 Document Classification: Proprietary Information March 4, 2009, Advance...

  • Page 49: Rohs 6/6 Compliant Marking Examples

    @ = Assembly location code Industrial Grade Package Marking Pin 1 location Note: The above example is not drawn to scale. Location of markings is approximate. Copyright © 2009 Marvell Doc. No. MV-S105540-00, Rev. -- March 4, 2009, Advance Document Classification: Proprietary Information...
  • Page 50 Industrial Grade Package Marking Pin 1 location Note: The above example is not drawn to scale. Location of markings is approximate. Doc. No. MV-S105540-00, Rev. -- Copyright © 2009 Marvell Page 50 Document Classification: Proprietary Information March 4, 2009, Advance...
  • Page 51 @ = Assembly location code Pin 1 location Note: The above example is not drawn to scale. Location of markings is approximate. Copyright © 2009 Marvell Doc. No. MV-S105540-00, Rev. -- March 4, 2009, Advance Document Classification: Proprietary Information...
  • Page 52 Back Cover Marvell Semiconductor, Inc. 5488 Marvell Lane Santa Clara, CA 95054, USA Tel: 1.408.222.2500 Fax: 1.408.752.9028 www.marvell.com Marvell. Moving Forward Faster...

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