Marvell 88E3015 Manual page 37

The 3 bits for each CONFIG pin are mapped as shown in
Table 18:
P in
CONFIG[0]
CONFIG[1]
CONFIG[2]
CONFIG[3]
Each bit in the configuration is defined as shown in
Table 19: Configuration Definition
B its D e fi ni ti on
PHYAD[4:0] PHY Address
ENA_XC 0 = Default Disable Auto-Crossover
1 = Default Enable Auto-Crossover
MODE[2:0] 000 = Copper - RGMII, Receive clock transition when data transi-
001 = Copper - RGMII, Receive clock transition when data stable
010 = Fiber - RGMII, Receive clock transition when data transitions
011 = Copper - MII
100 = Fiber - MII
110 = Copper - Source Synchronous MII
111 = Fiber - RGMII, Receive clock transition when data stable
Copyright © 2008 Marvell
January 4, 2008, Advance
Configuration Mapping
B i t 2
Reserved
Reserved
Reserved
MODE[2]
Table 19
tions
Document Classification: Proprietary Information
Table 18.
B i t 1 B i t 0
PHYAD[1] PHYAD[0]
PHYAD[3] PHYAD[2]
ENA_XC PHYAD[4]
MODE[1] MODE[0]
Doc. No. MV-S103657-00, Rev. D
Functional Description
Hardware Configuration
B i ts A ff ec t e d
None
16.5:4
In 100BASE-FX mode,
this should be disabled.
28.11:10, 28.3
Page 37