Marvell 88E3015 Manual page 17

Integrated 10/100 fast ethernet transceiver
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Table 8:
Clock/Configuration/Reset
88E30 15
88E3 018
32
38
33
39
3
3
2
2
1
1
56
64
9
10
49
57
39
4
Copyright © 2008 Marvell
January 4, 2008, Advance
Pin Name
Type
XTAL_IN
I
XTAL_OUT
O
CONFIG[3]
I
CONFIG[2]
CONFIG[1]
CONFIG[0]
RESETn
I
VREF
I
COMAn
I
Document Classification: Proprietary Information
De scrip tio n
Reference Clock. 25 MHz ± 50 ppm tolerance crys-
tal reference or oscillator input.
Reference Clock. 25 MHz ± 50 ppm tolerance crys-
tal reference. When the XTAL_OUT pin is not con-
nected, it should be left floating. XTAL_OUT is
used for crystal only. This pin should be left floating
when an oscillator input is connected to XTAL_IN.
Hardware Configuration.
See Section
2.6 "Hardware Configuration" on page
36
for details.
Hardware reset. Active low.
XTAL_IN/XTAL_OUT must be active for a minimum
of 10 clock cycles before the rising edge of
RESETn.
RESETn must be pulled high for normal operation.
MAC Interface input voltage reference.
Must be set to VDDOR/2 when used as 2.5V
SSTL_2.
Set to VDDOR when used as 2.5V/3.3V LV CMOS.
COMA Control. Active low. If RESETn is low then
COMAn has no effect. COMAn contains an internal
150 kohm pull-up resistor.
0 = In power saving mode
1 = Normal operation
Doc. No. MV-S103657-00, Rev. D
Signal Description
Pin Description
Page 17

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