Analog Devices ADP50460008 Owner's Manual page 45

ADI Confidential
Address 60 and Address 61—RTCALR (RTC Countdown Alarm Timer Repeat Data Registers)
Table 57. Bus Assignment Bit Map for the RTCALR Registers
Data
Register Range
RTCALR_SEC 0 to 119
RTCALR_MIN 0 to 59
1
The read status is assigned to Bit 7 (see the I
Address 62—RTCALRMD (RTC Countdown Time Alarm Mode Register)
Table 58. Bus Assignment Bit Map for the RTCALRMD Registers
B7 (MSB) B6
RDST_ALRM 0
Address 97—SEL_FSW (Switcher Frequency Select Register)
Table 59. Bus Assignment Bit Map
B7 (MSB) B6
0 SEL_FREQ7
Table 60. SEL_FSW Programming Bits
Bits Description
SEL_FREQ7 Channel 7 switching frequency.
0: 1.25 MHz.
1: 2.5 MHz.
SEL_FREQ4 Channel 4 switching frequency.
0: 1.25 MHz.
1: 2.5 MHz.
SEL_FREQ3[1:0] Channel 3 switching frequency.
00: 1.25 MHz.
01: 625 kHz.
10: 312 kHz.
11: 2.5 MHz.
SEL_FREQ2 Channel 2 switching frequency.
0: 1.25 MHz.
1: 2.5 MHz.
SEL_FREQ1 Channel 1 switching frequency.
0: 1.25 MHz.
1: 2.5 MHz.
Address 98—VID_REGO (VID for VREGO Output Voltage)
Table 61. Bus Assignment Bit Map
B7 (MSB) B6
0 0
Table 62. VID_REGO Programming Bits
Bits Description
VID_REGO VREGO output voltage selection.
0: 3.2 V.
1: 3.0 V.
B7 (MSB) B6
RDST_RSEC RSEC_6
RDST_RMIN 0
2
C Interface section).
B5 B4
0 ALMMD
B5 B4
1 SEL_FREQ4
B5 B4
0 0
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1
B5 B4
RSEC_5 RSEC_4
RMIN_5 RMIN_4
B3 B2
0 0
B3 B2
SEL_FREQ3_1 SEL_FREQ3_0
B3 B2
0 0
ADP50460008
B3 B2 B1
RSEC_3 RSEC_2 RSEC_1
RMIN_3 RMIN_2 RMIN_1
B1 B0 (LSB)
0 ALMST
B1 B0 (LSB)
SEL_FREQ2 SEL_FREQ1
B1 B0 (LSB)
0 VID_REGO
B0 (LSB)
RSEC_0
RMIN_0