Voltage Regulator Block - Analog Devices ADP50460008 Owner's Manual

ADP50460008

VOLTAGE REGULATOR BLOCK

Channel 1 Boost Regulator
The Channel 1 boost regulator provides a regulated output voltage
(higher than the input voltage) that is applied to one side of the
inductor. Channel 1 features adaptive on-time gated-oscillator
control in PSM mode and Flex-Mode™ current mode control in
PWM mode. The default output voltage in PSM mode is 3.6 V, and
the default output voltage in PWM mode is factory programmed
from 3.8 V to 5.3 V. PSM mode can deliver up to 30 mA at a 2.4 V
V voltage condition. PWM mode can deliver up to a 1.2 A
VBATT
output current at a typical V
VBATT
recommended that the voltage supply for the VDD pin be applied
from the Channel 1 output.
The adaptive on-time gated-oscillator control provides high
efficiency at light load conditions and a coarsely regulated 3.6 V
to the keep alive LDO regulator through the VDD pin. Therefore,
the control is suitable for a system that requires constant voltage
on the VREGO pin even in an EN = low condition. To ensure
the 30 mA maximum output current, the on time is controlled
by monitoring the V voltage. The Flex-Mode current mode
VBATT
control provides synchronous boost architecture with integrated
FETs for optimal efficiency and fast response to load changes.
The boost operates at a 2.5 MHz or 1.25 MHz switching frequency
in forced PWM mode.
Register PWMCONT, Bit 0 (PWM1) at Address 14 defines the
control mode. When Bit 0 is set to 0, Channel 1 operates in PSM
mode. When Bit 0 is set to 1, Channel 1 operates in PWM mode.
A high-to-low transition on the EN pin does not clear the data
in Bit 0 in Register PWMCONT unless a 0 is written into this
2
register through the I C interface. Channel 1 stays in PWM mode
when the EN pin is set to logic level high. The host processor can
override the default values for the output voltage, the internal
soft start time, and the factory-programmed start-up delay time
2
by sending I C commands.
SW1
+
Li+
–
voltage condition of 3.6 V. It is
BODY DIODE
7E
7F
8E
8F
ANTI-SHOOT-
CURRENT
SENSE AMP
7G 8G
PGND1
Figure 48. Channel 1 Boost Regulator Block Diagram
Channel 1 soft start is affected by the voltage that precharges the
output capacitor connected to VOUT1. This occurs because the
synchronous PFET body diode is forwardbiased, connecting the
battery voltage to VOUT1. Therefore, the actual soft start time
is shorter when the battery voltage is high.
The Channel 1 regulator soft start ramp is controlled by Bit 7
in Register SFTTIM at Address 2 (see Table 16, Table 17, and
Table 18). The Channel 1 regulator turn-on delay is controlled
by Bits[7:4] in Register EN_DLY12 at Address 4 (see Table 22,
Table 23, and Table 24). The output voltage level for Channel 1
is controlled by Bits[6:4] in Register VID12 at Address 8 (see
Table 34 and Table 35).
The boost regulator requires only one small external inductor
and the input and output ceramic capacitors for bypassing and
filtering purposes. The output voltage is sensed directly on the
two VOUT1 pins, and an internal voltage divider is used to set
the output voltage and to close the regulation loop. The current
mode regulation circuit derives the inductor current from the
internal FET, adding a compensation ramp from the oscillator
circuit. The resultant signal controls the regulation loop in a
cycle-by-cycle fashion. Channel 1 is protected against overcurrent
and overtemperature.
However, a path from VBATT to VOUT1 still exists through
the inductor and the synchronous PFET body diode. Therefore,
it is recommended that an input fuse be used to protect the
ADP5046 from damage due to a short to ground. The soft start
circuit ensures that the input and output currents increase
gradually when the regulator is turned on, avoiding stress on
the battery. The soft start is programmable to two values.
When the input voltage is approximately equal to or below the
output voltage level, the PFET is always on and the circuit cannot
regulate the output voltage. In this situation, the output voltage
equals the input voltage minus the resistive drop on the PFET
and the inductor.
MAX DUTY
THROUGH
2.5MHz
ON-TIME
GENERATOR
Rev. Sp0 | Page 26 of 60
ADI Confidential
ERROR
AMP
PWM
REF
COMP
REF
VBATT
VOUT1
7D
8D