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Address 13—OVPST (OVP Status Register)
Table 47. Bus Assignment Bit Map
B7 (MSB)
B6
0
OV7
Table 48. Overvoltage Status for Channel 2, Channel 3, Channel 6, and Channel 7
Bits
Description
OV7
Channel 7 overvoltage status. 1: the channel is in overvoltage condition.
OV6
Channel 6 overvoltage status. 1: the channel is in overvoltage condition.
OV3
Channel 3 overvoltage status. 1: the channel is in overvoltage condition.
OV2
Channel 2 overvoltage status. 1: the channel is in overvoltage condition.
Address 14—PWMCONT (Enable PWM Mode for Channel 1)
Table 49. Bus Assignment Bit Map
B7 (MSB)
B6
0
0
Table 50. Regulator Mode Control for Channel 1
Bit
Description
PWM1
Channel 1 switching mode. 0: PSM mode (default); 1: PWM mode.
Address 32—PCTRL (Power-On/Power-Off Sequence Register)
Table 51. Bus Assignment Bit Map
B7 (MSB)
B6
RDST_PCTRL
0
Table 52. Regulator Activation
Bits
Description
CH6_ON
Channel 6 Buck regulator on.
When enabled by sequencer (EN pin is high).
1: enable delay is active.
0: Channel 6 is off.
When enabled by I
1: Channel 6 is on.
0: Channel 6 is off.
CH8_ON
Channel 8 LDO on.
When enabled by sequencer (EN pin is high).
1: enable delay is active.
0: Channel 8 is off.
When enabled by I
1: Channel 8 is on.
0: Channel 8 is off.
CH7_ON
Channel 7 backlight regulator on.
1: Channel 7 is on.
0: Channel 7 is off (default).
CH4_ON
Channel 4 buck regulator on.
1: Channel 4 is on.
0: Channel 4 is off (default).
CH5_ON
Channel 5 load switch.
1: Channel 5 is on.
0: Channel 5 is off (default).
B5
B4
OV6
0
B5
B4
0
0
B5
B4
0
CH6_ON
2
C command,
2
C command,
Rev. Sp0 | Page 43 of 60
B3
B2
0
OV3
B3
B2
0
0
B3
B2
CH8_ON
CH7_ON
ADP50460008
B1
B0 (LSB)
OV2
0
B1
B0 (LSB)
0
PWM1
B1
B0 (LSB)
CH4_ON
CH5_ON
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