Analog Devices ADP50460008 Owner's Manual page 31

ADI Confidential
The output of Channel 6 is programmable through the I
interface in the range of 1.46 V to 2.5 V. The Channel 6 block
has an adjustable mode option, as well, that can be programmed
externally through a resistor divider to a value between 0.5 V
and V × 0.95. Note that an output voltage setting that is too low
IN
(for example, 0.5 V) may go out of regulation at high V
due to the minimum on time limitation of Channel 6.
Channel 6 includes an internal soft start function (see Figure 55)
that ramps the output voltage in a controlled manner upon
startup, thereby limiting the inrush current. This prevents
possible input voltage drops when a battery is connected to the
input of the converter. The soft start time can be programmed
through the I 2 C interface and set to 1.3 ms or 4 ms.
Channel 6 can start up from any voltage between 0 volts and
the final target output voltage without discharging the output
capacitor charge at the beginning of the soft start. This makes it
possible to connect an external LDO. If an external LDO is used,
the voltage setting for Channel 6 must be greater than the output
voltage of the external LDO.
Channel 6 enable mode can be selected from either sequencer
mode or the factory-programmed I
mode is selected, Channel 6 on/off activation is controlled by
the EN pin and the factory-programmed enable delay time.
2
C
conditions
IN
2 C mode. When sequencer
LDO VOLTAGE
KEEP ALIVE
< VOUT6
EXTERNAL LDO
FB6
2G
SW6
CHANNEL 6 1H
Figure 55. Soft Start into Prebiased Output
Rev. Sp0 | Page 31 of 60
2
When I C mode is selected, Channel 6 on/off activation is
controlled by Bit 4 in Register PCTRL at Address 32 (see Table 51
and Table 52).
When Channel 6 is disabled, there is an option to automatically
discharge the converter output capacitor though a discharge switch.
This discharge function can be enabled through the I
The overvoltage or undervoltage status of each channel can be
read back through the I
The regulator discharge switch for Channel 6 is controlled by
Bit 0 in Register DSCG at Address 1 (see Table 14 and Table 15).
The regulator soft start ramp for Channel 6 is controlled by
Bit 2 in Register SFTTIM at Address 2 (see Table 16, Table 17,
and Table 18).
The regulator turn-on delay for Channel 6 is controlled by
Bits[3:0] in Register EN_DLY36 at Address 5 (see Table 25,
Table 26, and Table 27). The output voltage level for Channel 6
is controlled by Bits[2:0] in Register VID6 at Address 10 (see
Table 40 and Table 41). The undervoltage protection status for
Channel 6 is confirmed by Bit 5 in Register UVPST at Address 12
(see Table 45 and Table 46). The overvoltage protection status
for Channel 6 can be tested by reading Bit 5 in Register OVPST
at Address 13 (see Table 47 and Table 48).
CHANNEL 6
ON
LDO
SOFT START INTO
PREBIASED OUTPUT
ADP50460008
2
C interface.
VOUT6
2
C interface.