NEC mPD789101 User Manual page 57

(a) Interrupt enable flag (IE)
This flag controls interrupt request acknowledge operations of CPU.
When IE = 0, the IE is set to interrupt disabled (DI) status. All interrupt requests except non-maskable
interrupt are disabled.
When IE = 1, the IE is set to interrupt enabled (EI) status and interrupt request acknowledgement is
controlled with an interrupt mask flag for various interrupt sources.
This flag is reset (0) upon DI instruction execution or interrupt acknowledgment and is set (1) upon EI
instruction execution.
(b) Zero flag (Z)
When the operation result is zero, this flag is set (1). It is reset (0) in all other cases.
(c) Auxiliary carry flag (AC)
If the operation result has a carry from bit 3 or a borrow at bit 3, this flag is set to (1). It is reset (0) in
all other cases.
(d) Carry flag (CY)
This flag stores overflow and underflow upon add/subtract instruction execution. It stores the shift-out
value upon rotate instruction execution and functions as a bit accumulator during bit manipulation
instruction execution.
CHAPTER 4 CPU ARCHITECTURE
User's Manual U13045EJ2V0UM00
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