NEC mPD789101 User Manual page 223

(c) Releasing by RESET input
When the HALT mode is released by the RESET signal, execution branches to the reset vector address
in the same manner as the ordinary reset operation, and program execution is started.
RESET
signal
Operating
mode
Clock
In the µ PD789104 and 789114 Subseries, 2
Note
In the µ PD789124 and 789134 Subseries, 2
Remark f : System clock oscillation frequency (ceramic/crystal oscillation)
X
f : System clock oscillation frequency (RC oscillation)
CC
Releasing Source
Maskable interrupt request
Non-maskable interrupt request
RESET input
×: don't care
CHAPTER 16 STANDBY FUNCTION
Figure 16-3. Releasing HALT Mode by RESET Input
HALT
instruction
HALT mode
Oscillation
Table 16-2. Operation after Release of HALT Mode
MK×× IE
0 0 Executes next address instruction
0 1 Executes interrupt processing
×
1 Retains HALT mode
×
— Executes interrupt processing
— — Reset processing
User's Manual U13045EJ2V0UM00
Note
Wait
Oscillation
Reset stabilization
wait status
period
Oscillation
stop Oscillation
15
/f : 6.55 ms (at f = 5.0-MHz operation)
X X
: 32 µ s (at f
7
/f = 4.0-MHz operation)
CC CC
Operation
Operating
mode
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