NEC mPD789101 User Manual page 164

CSIE20 SSE20 DAP20 DIR20 CSCK20 CKP20
SI20/P22/
RxD20
SO20/P21/
TxD20
SS20/P23/
CPT20/INTP0
SCK20/P20/
ASCK20
Note See Figure 13-2 for the configuration of the baud rate generator.
Figure 13-1. Serial Interface 20 Block Diagram
Serial operation mode
register 20 (CSIM20)
Receive buffer
register 20 (RXB20)
Receive shift
register 20 (RXS20)
Port mode
register (PM21)
4
Transmission data counter
Parity operation
SL20, CL20, PS200, PS201
Stop bit addition
Reception data counter
Reception enabled
Reception clock
Start bit
Detection clock
detection
CSIE20
CSCK20
Clock phase
control
Internal bus
Asynchronous serial
interface status register 20
(ASIS20)
PE20 FE20 OVE20
Switching of the first bit
register 20 (TXS20)
Reception
shift clock
Parity operation
Stop bit addition
Transmission
and reception
clock control
Reception detected
Internal clock output
Baud rate generator
control register 20 (BRGC20)
External clock input
Internal bus
TXE20 RXE20 PS201 PS200 CL20 SL20
Transmit shift
Transmit
shift clock
Selector
CSIE20
Data phase
DAP20
control
CSIE20
Baud rate
CSCK20
generator note
f /2 to f /2
X X
4
TPS203 TPS202 TPS201 TPS200
Asynchronous serial
interface mode register 20
(ASIM20)
INTST20
INTSR20/INTCSI20
8