NEC mPD789101 User Manual page 136

CHAPTER 11 8-BIT A/D CONVERTER ( µ PD789104, 789124 SUBSERIES)
ANI0/P60
ANI1/P61
ANI2/P62
ANI3/P63
2
ADS01 ADS00
A/D input selection
register 0 (ADS0)
(1) Successive approximation register (SAR)
The SAR receives the result of comparing an analog input voltage and a voltage at a voltage tap (comparison
voltage), received from the series resistor string, starting from the most significant bit (MSB).
Upon receiving all the bits, down to the least significant bit (LSB), that is, upon the completion of A/D
conversion, the SAR sends its contents to A/D conversion result register 0 (ADCR0).
(2) A/D conversion result register 0 (ADCR0)
ADCR0 holds the result of A/D conversion. Each time A/D conversion ends, the conversion result received
from the successive approximation register is loaded into ADCR0, which is an 8-bit register that holds the result
of A/D conversion.
ADCR0 can be read with an 8-bit memory manipulation instruction.
RESET input makes this register undefined.
(3) Sample and hold circuit
The sample and hold circuit samples consecutive analog inputs from the input circuit, one by one, and sends
them to the voltage comparator. The sampled analog input voltage is held during A/D conversion.
(4) Voltage comparator
The voltage comparator compares an analog input with the voltage output by the series resistor string.
136
Figure 11-1. Block Diagram of 8-Bit A/D Converter
Sample and hold circuit
AV
SS
ADCS0 FR02 FR01
A/D converter mode register 0
(ADM0)
Internal bus
User's Manual U13045EJ2V0UM00
Voltage comparator
Successive
approximation
register (AR)
Control
circuit
A/D conversion result
register 0 (ADCR0)
FR00
AV
DD
P-ch
AV
SS
INTAD0